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version - 4 december 4, 2006 6024 silver creek valley road, san jose, ca 95138 telephone: (800) 345-7015 ? twx: 910-338-2070 ? fax: (408) 284-2775 printed in u.s.a. ? 2006 integrated device technology, inc. inverse multiplexing for atm IDT82V2608
disclaimer integrated device technology, inc. reserves the right to make changes to its products or specifications at any time, without no tice, in order to improve design or performance and to supply the best possible product. id t does not assume any responsibility for us e of any circuitry described other than t he circuitry embodied in an idt product. the company makes no representations that circuitry described herein is free from pat ent infringement or other rights of third part ies which may result from its use. no license is granted by implication or otherwise under any patent, patent rights or other rights, of integrated device technology, inc. life support policy integrated device technology's products are not authorized for us e as critical components in life support devices or systems un less a specific written agreement pertaining to such intended use is executed between t he manufacturer and an officer of idt. 1. life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) supp ort or sustain life and whose failure to perform, when properly used in accordance with instru ctions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. a critical component is any components of a life support device or system whose failure to per form can be reasonably expecte d to cause the failure of the life support device or system, or to affect its safety or effectiveness.
table of contents 3 december 4, 2006 table of contents .......... ................ ................. ................ ................. ................ ................. ................ ................. ............. 3 list of tables .............. ................ ................. ................ ................. ................. ............... .................. ........... ............ ........... 6 list of figures ............. ................ ................. ................ ................. ................. ............... .................. ........... ............ ........... 8 features ............. ................. ................ ................. .............. .............. .............. .............. ................. .............. .............. .......... 9 applications........... ................ ................. .............. .............. .............. ............... .............. .............. .............. .............. .......... 9 standards compliant ........... ................ ................. ................ ................. ................ ............... ................ .............. .......... 9 description............. ................ ................. .............. .............. .............. ............... ............. .................... .............. ............ ....... 9 functional block diagram ............... ................ ................. .............. .............. .............. ............. ............. ............ ........ 10 1 pin assignment ...... ................. ................ ................. .............. .............. .............. ............. ................ .............. ........... 11 2 pin description ............ ................. ................ ................. ................ ................. ............... ................ .............. ........... 12 3 interface .............. ................ ................. .............. .............. .............. ............... ............ ................ ................ .............. 18 3.1 utopia interface ........ ................. ................ ................. ................ ................. ................ ................. ........... 18 3.1.1 utopia loopback function .. ................. ................ ................. ................ ................. ............. ................. 18 3.2 line interface ........... ................ ................. ................ ................. ................ ................ ................. .............. 19 3.2.1 line interface work modes ........ ................. ................ ............... .............. .............. ............. ................. 19 3.2.1.1 mode0 ........... ................. ................ .............. ............... .............. .............. .............. ............... 20 3.2.1.2 mode1~mode4 ............ ................. ................ ................. ................ ................. .............. ........ 20 3.2.1.3 mode5~mode6 ............ ................. ................ ................. ................ ................. .............. ........ 22 3.2.1.4 mode7~mode10 .......... ................. ................ ................. ................ ................. ............... ....... 22 3.2.1.5 mode11 ............ ................ ................. .............. .............. .............. .............. ............. .............. 22 3.2.1.6 mode12~mode13 ............. ................. ................ ................. ................ .............. .............. ...... 22 3.2.1.7 mode14~mode15 ............. ................. ................ ................. ................ .............. .............. ...... 23 3.2.2 line interface timing clo ck modes.................. ................ .............. .............. ............... ............ ............. 23 3.2.3 line interface loopback func tion ............... ................ ................. .............. .............. .............. .............. 23 3.3 external microprocessor interface .. ................ ................. .............. .............. .............. ............. ... 24 3.3.1 external microprocessor interface selection............. ................. ................ ................. ................ ......... 24 3.3.2 command fifos............. ................ ................. ................ ................. ................ .............. ............ ......... 24 3.3.3 registers .......... ................. ................ ............... .............. .............. .............. ............. .................. ........... 24 3.3.4 register map........... ................. ................. ................ ................. ................ ................ ............... ........... 24 3.3.5 register description..... ................. ................ ................. ................ ................. .............. .............. ......... 25 3.3.6 procedure of loading software and sending commands ............. .............. ............... .............. ........... 27 3.4 sram interface ........... ................. ................ ................. ................ ................. ............... ............... .............. 29 4 ima and uni functions ...... ................. ................ ................. ................. ................ ............... ............. ............ ......... 30 4.1 ima mode ............ ................. ................ ............... .............. .............. .............. ............. ............. .............. ......... 30 4.1.1 ima frame .............. ................. ................. ................ ................. ................ ................ ............... ........... 30 4.1.2 trl (timing reference link) ..... ................. ................ ............... .............. .............. .............. ................ 30 4.1.3 stuffing mode .......... ................. ................. ................ ................. ................ ................ ............... ........... 30 table of contents
IDT82V2608 inverse multiplexing for atm table of contents 4 december 4, 2006 4.1.4 link backup......... ................ ................. .............. .............. .............. .............. ............. ................ ........... 30 4.2 uni mode ............ ................. ................ ............... .............. .............. .............. ............. ............. .............. ......... 30 5 programming information for imaos08 ............ ................ ................. ................ ................. ............ ............. 31 5.1 command types ........... ................. ................ ................. ................ ................. ................ ................. ........... 31 5.1.1 command message ............ ................. ................ ................. ................ ............... .............. ............ ...... 31 5.1.2 command reply message..... ................ ................. ................ ................. ................ .............. .............. 31 5.1.3 alarm message ............ ................. ................ ................. ................ ................. .............. .............. ......... 31 5.2 command encoding ................. ................. ................ ............... .............. .............. .............. .............. ......... 32 5.3 command description ..... ................. ................ ................. ................ ................. ................ ............ ......... 33 6 ima operation ............. ................ ................. ................. ................ ................. ................ ................. .............. ........... 69 6.1 ima initialization ....... ................ ................. ................ ................. ................ ................ ................. .............. 69 6.2 configure a group ................. ................. ................ ............... .............. .............. ............. ............. ........... 69 6.3 start up a group ......... ................. ................. ................ ................. ................ ............... ................ ........... 70 6.4 inhibit a group/not inhibi t a group ............... ................ .............. .............. ............... .............. ........... 70 6.5 add links to a group that is in operational state .......... ................ ................. .............. ........... 70 6.6 delete links ............ ................. ................ ................. ................. ................ ................ ................. ................ 70 6.7 deactivate and recover links ....... ................. ................ .............. .............. ............... ............ ............. 70 6.8 restart a group .......... ................. ................. ................ ................. ................ ............... ................ ........... 70 6.9 delete a group ........... ................. ................ ................. ................ ................. ............... ............... .............. 70 7 pmon (performance monitoring) ........ ................. ................ .............. .............. ............... ............ ........... ......... 71 8 imaos08_slave .......... ................ ................. .............. .............. .............. .............. ............. ................ .............. ........... 73 8.1 group auto detect ..... ................. .............. .............. ............... .............. .............. ............. ............. ........... 73 8.1.1 master side ......... ................ ................. .............. .............. .............. .............. ............. ................ ........... 73 8.1.2 slave side ........ ................. ................ ............... .............. .............. .............. .............. ................. ........... 73 8.2 programming information fo r imaos08_slave ............. ................ ................. ................ .............. 73 8.2.1 command types .............. ................ ................. ................ ................. ................ ............. ............. ......... 73 8.2.2 command encoding.......... ................ ................. ................. ................ ................. ............. ................... 73 8.2.3 command description....... ................ ................. ................. ................ ................. ............. ................... 73 9 jtag test access port .... ................. ................ ................. ................. ................ ................. ........... ............ ......... 80 9.1 tap bus signals .......... ................. ................ ................. ................ ................. ............... ............... .............. 80 9.2 instructions ............. ................ ................. ................ ................. ................ ................ ............... ................ 80 10 physical and electrical characteristi cs ............... ............... .............. .............. .............. ............ ........... 81 10.1 absolute maximum ratings ............ ................ .............. ............... .............. .............. ............. ................. 81 10.2 d.c. characteristics ..... ................ ................. ................ ................. ................ ............... .............. ........... 81 10.3 a.c. characteristics ..... ................ ................. ................ ................. ................ ............... .............. ........... 82 10.3.1 output loading...... ................. .............. .............. .............. .............. .............. .............. ............... ........... 82 10.3.2 system clock and rst sig nal timing ............. ................ ................. .............. .............. ............. .......... 82 10.3.3 utopia interface timing ................. ................ ................. ................ ................. ............... ............. ......... 83 10.3.4 line interface timing.. ................ ................. ................ ................. ................ ................ ............. ........... 84 10.3.5 microprocessor interface timing .. ................ .............. ............... .............. .............. .............. ................ 85 10.3.5.1 interface with motoro la cpu (mpm =0) ..... ................. ................ ................. .............. .......... 85 10.3.5.2 interface with intel cpu (mpm =1)........... ................ ................. .............. .............. .............. . 87
IDT82V2608 inverse multiplexing for atm table of contents 5 december 4, 2006 10.3.6 sram interface timing ... ................ ................. ................ ................. ................ ............... ........... ......... 89 10.3.6.1 write cycle specification.... ................. ................. .............. .............. .............. .............. ........ 89 10.3.6.2 read cycle specificat ion ............. ................ ................. ................ ................. ................ ...... 90 glossary ........... ................. ................ ................. ................ .............. ............... ............ ............. ............... .............. ........... 91 index ............... ................. ................ ................. .............. .............. .............. .............. ................... ............... .............. ........... 95 ordering information........ ................. ................ ................. ................ ................. ................ ............... .............. .......... 98
list of tables 6 december 4, 2006 list of tables table-1 pin description...... ................ ................. ................ ................. ................ ................. .............. .............. ........ 12 table-2 data rates of different modes............ ................. ................ ................. ................ ............. ................ .......... 20 table-3 pins used in multi-rate multiple x mode ................ ................. ................ ................. ................ ............ ........ 22 table-4 register map......... ................ ................. ................ ................. ................ ................. .............. .............. ........ 24 table-5 input fifo data length register (input_fifo_length_reg) ..... ................ ................. .............. .......... 25 table-6 output fifo data lengt h register (output_fifo_length _reg) ................ ............... .............. .......... 25 table-7 output fifo data regi ster (output_fifo_data_reg) ... .............. .............. .............. .............. ............. 25 table-8 input fifo data register (inp ut_fifo_data_reg) ... .............. .............. .............. .............. ............... ..... 25 table-9 fifo interrupt enable register (fifo_int_enable_reg) ................. .............. ............... ........... ........... .. 26 table-10 fifo interrupt status register (fifo_state_reg).. ............. .............. .............. ............... .............. .......... 26 table-11 fifo interrupt reset register (fifo_int_reset_reg) ....... ................. ................ .............. ............... ..... 26 table-12 output fifo internal state register (output_fifo_int ernal_state_reg)............. .............. .......... 26 table-13 input fifo internal state register (input_fifo_in ternal_state_reg) .............. ................ ............. 27 table-14 maximum delay to lerance value for different sram size in t1 unchannelized mo de ......... ............ ........ 29 table-15 maximum delay to lerance value for different sr am size in e1 unchannelized mo de................ ............. 29 table-16 command encoding .... ................ ................. ................ ................. ................ ................. ................ ............. 32 table-17 configdev command (enc oding: 01h)........... ................. ................ .............. ............... ............. .................. 33 table-18 configutopiaif comman d (encoding: 03h) ............. .............. .............. .............. .............. ............ ............... 35 table-19 configloopmode command (e ncoding: 04h) .......... ................ .............. .............. ............... ............ ............ 36 table-20 configgrouppara command (encoding: 05h) ................ ................ ................. ................ ............... ............ 37 table-21 configgroupinterface command (encoding: 06h)......... ................ ................. ................ ................. .......... 39 table-22 configgroupworkmode command (encoding: 07h)......... .............. .............. ............... .............. .......... ....... 40 table-23 configgsmtimers comm and (encoding: 08h)............... ................ ................. ................ ................ ........... 41 table-24 configtrllink command (encoding: 09h)................ ................. ................ ................. ................ ............... 42 table-25 configifsmpara command (encoding : 0ah) ............ .............. .............. .............. ............... ............ ............ 43 table-26 addtxlink command (encoding: 0b h) .................... ................ ................. ................ ................. ................. 44 table-27 addrxlink command (encoding: 0ch) ................ .............. ............... .............. .............. ............. ................ 46 table-28 configunilink command (encoding: 0dh)......... ................ ............... .............. .............. .............. ............... 47 table-29 startgroup command (e ncoding: 0eh) ............ ................ .............. .............. ............... .............. ................. 48 table-30 startlasr command (encoding: 0f h) .................... ................ ................. ................ ................. ................. 49 table-31 inhibitgrp comm and (encoding: 10h)................. .............. .............. .............. ............... ........... ............ ........ 50 table-32 notinhibitgrp command (encoding: 11h) .................. ................. ................ ................. .............. ................. 51 table-33 restartgrp command (e ncoding: 12h)............. ................ .............. .............. ............... ............. .................. 52 table-34 deletegrp command (enc oding: 13h) ..................... ................ ................. ................ ................ .................. 53 table-35 recoverlink command (encoding: 14h ) ................. .............. .............. .............. .............. ........... ................ 54 table-36 deletelink command (encoding: 15h) ............... .............. .............. .............. ............... ............. .................. 55 table-37 deactlink command (encoding: 16h) . ................. .............. ............... .............. .............. ........... .................. 56 table-38 getgroupstate command (encoding: 17h) ................. ................. ................ ................. ............... .............. 57 table-39 getgroupdelayinfo command (encod ing: 18h) ................. ................. ................ ............... ............. ........... 58 table-40 getlinkstate command (encoding: 19h)................. ................ ................. ................ ................. ................. 59 table-41 getgrpperf command (e ncoding: 1ah)......... ................. ................ .............. ............... .............. ................. 60
IDT82V2608 inverse multiplexing for atm list of tables 7 december 4, 2006 table-42 getlinkperf command (encoding: 1b h) ............... .............. ............... .............. .............. ............ ................. 61 table-43 getconfigpara command (encoding: 1ch) ............... .............. .............. .............. ............... .......... .............. 63 table-44 getgrpworkingpara comm and (encoding: 1dh) ............. ................. ................ ................. ............... ......... 64 table-45 getlinkworkingpara comm and (encoding: 1eh)........... ................ ................. ................ ................. .......... 65 table-46 starttestpattern command (encodi ng: 1fh) ............. ................. ................ ................. ................ ............... 66 table-47 getloopedtestpattern command (encoding: 20h) .......... ................. ................ ................. ............... ......... 67 table-48 stoptestpattern command (encoding : 21h) .................. ................ ................. ................ ............. .............. 68 table-49 getversioninfo comma nd (encoding: 22h) ...... ................ ................. .............. .............. .............. ............... 68 table-50 parameters for ima group configur ation ................. ................ ................. ................ ............... ........... ........ 69 table-51 the pmon parameters ........... ................ ................. .............. .............. .............. .............. ................. .......... 71 table-52 definitions of different icp ce lls.............. .............. .............. ............... .............. .............. ................ ............. 71 table-53 failure/alarm signals ................. ................ ................. ................. ................ ............... ............. ............ ........ 72 table-54 command encoding .... ................ ................. ................ ................. ................ ................. ................ ............. 73 table-55 deviceinitial command (encoding: 01h) ............... .............. ............... .............. .............. .......... ........... ........ 74 table-56 configslaveframe command (encod ing: 02h) ........... ............... .............. .............. .............. ........... ........... 76 table-57 configutopiaif comman d (encoding: 03h) ............. .............. .............. .............. .............. ............ ............... 77 table-58 getversioninfo comma nd (encoding: 22h) ...... ................ ................. .............. .............. .............. ............... 78 table-59 groupinitial command (e ncoding: 23h) ......... ................. ................ .............. ............... ............ ........... ........ 79 table-60 absolute maximum ratings ....... ................ ................. .............. .............. .............. ............. ................ .......... 81 table-61 d.c. characteristics ......... ................. ................. .............. .............. .............. .............. .............. ............ ........ 81 table-62 system clock and rese t timing parameters ............. ................. ................ ................. ................ ............... 82 table-63 utopia interface timing paramete rs .................... ................ ................. ................ ................ ............. .......... 83 table-64 line interface timing paramete rs................. .............. .............. .............. .............. .............. ............... .......... 84 table-65 microprocessor interface timing pa rameter for motorola cpu read cycle .... ................ ................. .......... 85 table-66 microprocessor interface timing parameters for motorola cpu write cycl e................. ................ ............. 8 6 table-67 microprocessor interface timing pa rameter for intel cpu read cycle.............. .............. .............. ........... .. 87 table-68 microprocessor interface timing pa rameters for intel cpu writ e cycle ............ .............. .............. ........... .. 88 table-69 sram interface write cycle parameters...... ................ ................. ................ ............... ............ ........... ........ 89 table-70 sram interface read cycle para meters ............ .............. .............. .............. ............... .............. ................. 90
list of figures 8 december 4, 2006 figure-1 functional diagram .. ................. ................ ................. ................. ................ ............... ............. ............ ......... 10 figure-2 IDT82V2608 pbga208 pack age pin assignment .............. ................. ................ ................. ............. .......... 11 figure-3 utopia loopback ......... ................ ................. ................ ................. .............. .............. .............. ............ ......... 18 figure-4 line interface work modes ..... ................ ................. .............. .............. .............. ............. ............... .............. 19 figure-5 g.802 mapping m ode ...................... ................. ................ ................. .............. .............. ................ .............. 21 figure-6 spaced mapping mode ........... ................ ................. .............. .............. .............. ............. ............... .............. 21 figure-7 multiplexing four 2 mh z streams into one 8 mh z stream ............... .............. .............. ............ .......... ........ 22 figure-8 input fifo write process .... ................. ................ .............. ............... .............. .............. ................ .............. 27 figure-9 output fifo read process ...... ................ ................. .............. .............. .............. ............. ................ ........... 28 figure-10 command message format .............. ................. ................ ................. ................ ............... .............. ........... 31 figure-11 command reply message format ................ ................. .............. .............. .............. .............. ............ ......... 31 figure-12 alarm message format ........ ................. ................ .............. ............... .............. ............. ................. .............. 31 figure-13 reset signal timing diagram .. ................. ............... .............. .............. .............. .............. ................. ........... 82 figure-14 tx utopia interface timing di agram ............ .............. .............. .............. .............. ............... .............. ........... 83 figure-15 rx utopia interface timing diagr am .............. .............. ............... .............. .............. ............ .............. ........... 83 figure-16 line interface transmit timing diagram ............. ................ ................. ................ ................. .............. ......... 84 figure-17 line interface receive timing diagram ......... .............. ............... .............. .............. .............. .............. ......... 84 figure-18 microprocessor interfac e timing diagram for motorola cpu read cycle .... ................. ................ ............. .85 figure-19 microprocessor interface timing diagram for motorola cpu wr ite cycle ......... .............. .............. ............ .. 86 figure-20 microprocessor interface timing diagram for intel cpu read cycle .............. .............. .............. ........... ..... 87 figure-21 microprocessor interface timing diagram for intel cpu writ e cycle ........... ............... .............. ............ ...... 88 figure-22 sram interface timing diagram fo r write cycle .............. ................. .............. .............. ............. ................. 89 figure-23 sram interface timing diagram fo r read cycle ........ ................. ................ ................. ............... ............... 90 list of figures
? 2006 integrated device technology, inc. dsc-6227-4 the idt and the idt logo are registered trademar ks of integrated device technology, inc. 9 december 4, 2006 inverse multiplexing for atm features ! highlights ? provides api command set for convenient configuration and operation. an embedded controller and a downloaded soft- ware are used to interpret the commands. functions can be added by software upgrading. ? supports ima group auto detect. ? supports link backup so that a backup link can be automati- cally added when a previously configured link fails. ? all the state machines are implemented in hardware. ? advanced cell buffer management algorithm to support atm qos requirements. ! other features ? accommodates up to 4 ima logical groups. ? supports 8 t1/e1 channelized or unchannelized links. ? supports t1 isdn links. ? supports mixed mode: links not assigned to an ima group can be used in uni mode. ? supports symmetrical and asymmetrical operation. ? supports common transmit clock (ctc) and independent transmit clock (itc) timing modes. ? provides 8 utopia level 2 8 bit cell level handshake mphy interface to atm device. ? supports maximum link delay tolerance of up to 212 ms for e1 or 281 ms for t1 (when 512 kb external memory is used). ? provides parameters for mib (management information base). ? supports dynamic addition/deletion of links to/from a working ima group. ? supports non-multiplexed intel or motorola microprocessor interface. ? loopback capability at both tdm and utopia ports. ? supports mvip. ? jtag boundary scan meets ieee 1149.1. ? package: 208 pin pbga. ? 3.3v operation / 5v tolerant input. applications ? dslam concentrator ? 3g wireless base station controller (nodeb) and radio network controller (rnc) ? integrated access devices (iad) standards compliant ! atm-forum ? utopia level 2 version 1. 0, af-phy-0039.000, june 1995. ? inverse multiplexing for atm specification version 1.1, af-phy- 0086.001, march 1999. ? backward compatible with inverse multiplexing for atm spec- ification version 1.0, af -phy-0086.000, september 1994. ? ds1 physical layer specification, af-phy-0016.000, september 1994. ? e1 physical interface specification, af-phy-0064.000, september 1996. ! itu-t ? i.432 b-isdn user network interface phy specification. ? g.804 atm cell mapping into plesiochronous digital hier- archy (pdh). ? g.802 inter-working between networks based on different digital hierarchies and speech encoding laws. ? i.610 b-isdn operation and main tenance principles and func- tions. ! ansi ? ansi t1.646-1995, broadband-isdn-physical layer specifi- cation for user-network interface including ds1/atm, 1995. ! mvip description the 8-port IDT82V2608 is a feature -rich device that provides the solution to implement ima and uni l ogical channels over t1 or e1 links in all public or private uni, nni and b-ici applications. the chip is compliant with the atm forum ima specification v1.1 and backward compatible with ima specification v1.0. in the chip architecture, up to 8 physically independent t1/e1 streams can be terminated through the utilization of most t1/e1 framers and lius in the market, and up to 4 logical ima groups (i.e., 4 data chan- nels) can be supported at the same ti me. to interface with most popular atm layer chips in the market, IDT82V2608 supports utopia level 2 mphy cell level handshake 8-bit bus interface. through a well-defined api command set, ima function can be easily designed into various ima systems and there is little necessity to access a large amount of registers. a downloaded software is used to interpret the command set and can be easily upgraded to meet specific require- ment. IDT82V2608
functional block diagram 10 december 4, 2006 IDT82V2608 inverse multiplexing for atm functional block diagram figure-1 functional diagram tc link cell fifo tx ima data processor tx group cell fifos rx group cell fifos rx ima data processor link cell fifo tc ima protocol processor utopia pmon external sram_if jtag rsd[8:1] rsck[8:1] rsf[8:1] rscfs rscck sysclk rst control interface tsd[8:1] tsck[8:1] tsf[8:1] tscfs tscck txclk txenb txaddr[4:0] txdata[7:0] txclav txsoc rxclk rxenb rxaddr[4:0] rxdata[7:0] rxclav rxsoc tdo tck tms tdi trst emd[7:0] ema[18:0] em_we em_cs em_oe a[7:0] rd/ds wr/rw cs int d[7:0] mpm line interface lp3 lp2 lp1 lp1: utopia loopback lp2: line interface internal loopback lp3: line interface external loopback
pin assignment 11 december 4, 2006 IDT82V2608 inverse multiplexing for atm 1 pin assignment figure-2 IDT82V2608 pbga208 package pin assignment (top view) 12345678910111213141516 a gnd ic ic emd4 emd0 ema18 ema15 ema12 ema11 ema8 ema5 ema1 rxdata2 rxdata5 rxdata7 gnd a b tms tdi ic emd5 emd1 em_oe ema16 ema13 ema10 ema7 ema4 ema0 rxdata3 rxdata6 rxsoc rxclav b c trst tck ic emd6 emd2 em_cs ema17 ema14 ema9 ema6 ema3 rxdata0 rxdata4 rxaddr4 rxaddr3 rxaddr2 c d nc tdo ic emd7 emd3 em_we vdd gnd gnd vdd ema2 rxdata1 rxaddr1 rxaddr0 rxenb rxclk d e rsck1 rsd1 vdd sysclk txclav txclk txaddr0 txaddr1 e f rsck2 rsd2 rsf1 vdd txaddr2 txaddr3 txaddr4 txsoc f g rsck3 rsd3 rsf2 vdd gnd gnd gnd gnd vdd txenb txdata7 txdata6 g h rsck4 rsd4 rsf3 gnd gnd gnd gnd gnd gnd txdata5 txdata4 txdata3 h j rsf4 rsd5 rsck5 gnd gnd gnd gnd gnd gnd txdata0 txdata1 txdata2 j k rsf5 rsd6 rsck6 vdd gnd gnd gnd gnd vdd ic ic ic k l rsf6 rsd7 rsck7 vdd cs ic ic ic l m rsf7 rsd8 rsck8 vdd a6 a7 rd / ds wr /r w m n rsf8 rscfs rscck vdd vdd vdd vdd gnd gnd vdd vdda1a2a3a4a5 n p tscck tscfs vdd tsf8 tsf7 tsf6 tsf5 tsf4 tsck2 tsck1 ic vdd d6 d7 mpm a0 p r vdd nc tsd8 tsd7 tsd6 tsd5 tsd4 tsd3 tsd2 tsd1 rst int d2 d3 d4 d5 r t gnd vdd tsck8 tsck7 tsck6 tsck5 tsck4 tsck3 tsf3 tsf2 tsf1 ic nc d0 d1 gnd t 12345678910111213141516
pin description 12 december 4, 2006 IDT82V2608 inverse multiplexing for atm 2 pin description table-1 pin description name pin number input/output description global signals sysclk e4 i sysclk: system clock system clock for the IDT82V2608. default is 20 mhz. rst r11 i rst : system reset system reset signal, low active. after reset, all registers are reset to default values, and both the con- tents in sram and the downloaded software are cleared. atm utopia interface txclk e14 i txclk: utopia transmit clock utopia transmit clock used to transfer data from the atm layer to the IDT82V2608. the frequency of the txclk should be less than or equal to that of the system clock. data is sampled on the rising edge of this signal. txenb g14 i txenb : utopia transmit enable utopia low active signal asserted by the atm layer device during cycles when txdata contains valid cell data. the txenb input is sampled on the rising edge of txclk. txaddr4 txaddr3 txaddr2 txaddr1 txaddr0 f15 f14 f13 e16 e15 i txaddr[4:0]: utopia transmit address utopia transmit port address driven from the atm layer to poll and select an appropriate port. the txaddr[4:0] input bus are sampled on the rising edge of txclk. txdata7 txdata6 txdata5 txdata4 txdata3 txdata2 txdata1 txdata0 g15 g16 h14 h15 h16 j16 j15 j14 i txdata[7:0]: utopia transmit data utopia 8-bit data bus driven from the atm layer to the IDT82V2608. the txdata[7:0] input bus are sampled on the rising edge of txclk. txclav e13 high-z o txclav: utopia transmit cell available utopia transmit cell available signal from the IDT82V2608 to the atm layer. a polled port drives txclav only during each cycle following one with its address on the txaddr lines. the polled port asserts txclav high to indicate its corresponding fifo can accept the transfer of a complete cell, otherwise it deasserts the signal. the txclav output is updated on the rising edge of txclk. note: this pin requires a pull-down resistor. txsoc f16 i txsoc: utopia transmit start of cell utopia start of cell signal. it will be driven high by the atm layer when txdata[7:0] contain the first valid byte of a cell. the txsoc input is sampled on the rising edge of txclk. rxclk d16 i rxclk: utopia receive clock utopia receive clock. the frequency of rxclk should be less than or equal to the frequency of the sys- tem clock. data is sampled on the rising edge of this signal. rxenb d15 i rxenb : utopia receive enable when this pin is low, the received data will be transferred on rxdata[7:0] in the following cycles. the rxenb input is sampled on the rising edge of rxclk.
pin description 13 december 4, 2006 IDT82V2608 inverse multiplexing for atm rxaddr4 rxaddr3 rxaddr2 rxaddr1 rxaddr0 c14 c15 c16 d13 d14 i rxaddr[4:0]: utopia receive address utopia receive port address driven from the atm layer to poll and select an appropriate port. the rxaddr[4:0] input bus are sampled on the rising edge of rxclk. rxdata7 rxdata6 rxdata5 rxdata4 rxdata3 rxdata2 rxdata1 rxdata0 a15 b14 a14 c13 b13 a13 d12 c12 high-z o rxdata[7:0]: utopi a receive data utopia 8-bit data bus driven from the IDT82V2608 to the atm layer. the rxdata[7:0] output bus are updated on the rising edge of rxclk. rxclav b16 high-z o rxclav: utopia receive cell available utopia cell available signal. a polled port drives rxclav only during each cycle following one with its address on the rxaddr lines. the polled port asserts rxclav high to indicate its corresponding fifo has a complete cell available for transfer to the atm layer, otherwise it deasserts the signal. the rxclav output is updated on the rising edge of rxclk. note: this pin requires a pull-down resistor. rxsoc b15 high-z o rxsoc: utopia receive start of cell utopia start of cell pulse. it will be driven high when rxdata[7:0] contain the first valid byte of a cell. the rxsoc input is updated on the rising edge of rxclk. t1/e1 line interface tsd8 tsd7 tsd6 tsd5 tsd4 tsd3 tsd2 tsd1 r3 r4 r5 r6 r7 r8 r9 r10 o tsdn: transmit side data output tsdn contains the transmit data for the n-th link. the tsdn output is updated on the rising edge of tsckn or tscck if common clock is used. tsck8 tsck7 tsck6 tsck5 tsck4 tsck3 tsck2 tsck1 t3 t4 t5 t6 t7 t8 p9 p10 i tsckn: transmit side clock tsckn contains the transmit clock for the n-th link. note: if unused, tsckn should be connected to ground. tsf8 tsf7 tsf6 tsf5 tsf4 tsf3 tsf2 tsf1 p4 p5 p6 p7 p8 t9 t10 t11 i tsfn: transmit side frame pulse tsfn is used to delineate each frame for the n-th link. the tsfn input is sampled on the falling edge of tsckn or tscck if common clock is used. note: if unused, tsfn should be connected to ground. table-1 pin description (continued) name pin number input/output description
pin description 14 december 4, 2006 IDT82V2608 inverse multiplexing for atm tscck p1 i tscck: transmit side common clock tscck is the transmit clock for links that are configured in common clock mode. note: if unused, tscck should be connected to ground. tscfs p2 i tscfs: transmit side common frame pulse this signal is used to delineate each frame for links that are configured in common clock mode. the tscfs input is sampled on the falling edge of tscck. note: if unused, tscfs should be connected to ground. rsd8 rsd7 rsd6 rsd5 rsd4 rsd3 rsd2 rsd1 m2 l2 k2 j2 h2 g2 f2 e2 i rsdn: receive side data input rsdn contains the receive data for the n-th link. the rsdn input is sampled on the falling edge of rsckn or rscck if common clock is used. note: if unused, rsdn should be connected to ground. rsck8 rsck7 rsck6 rsck5 rsck4 rsck3 rsck2 rsck1 m3 l3 k3 j3 h1 g1 f1 e1 i rsckn: receive side clock rsckn contains the recovered line clock for the n-th link. note: if unused, rsckn should be connected to ground. rsf8 rsf7 rsf6 rsf5 rsf4 rsf3 rsf2 rsf1 n1 m1 l1 k1 j1 h3 g3 f3 i rsfn: receive side frame pulse rsfn is used to delineate each frame for the n-th link. the rsfn input is sampled on the falling edge of rsckn or rscck if common clock is used. note: if unused, rsfn should be connected to ground. rscck n3 i rscck: receive side common clock rscck is the receive clock for links that are configured in common clock mode. note: if unused, rscck should be connected to ground. rscfs n2 i rscfs: receive side common frame pulse rscfs is used to delineate each frame for links that are configured in common clock mode. the rscfs input is sampled on the falling edge of rscck. note: if unused, rscfs should be connected to ground. microprocessor interface mpm p15 i mpm: microprocessor interface mode connected to vdd for intel; connected to gnd for motorola. table-1 pin description (continued) name pin number input/output description
pin description 15 december 4, 2006 IDT82V2608 inverse multiplexing for atm rd / ds m15 i rd : read operation in parallel intel microprocessor interface mode, this pin is asserted low by the microprocessor to initiate a read cycle. data is output to d[7:0] from the device. ds : data strobe in parallel motorola microprocessor interface mode, this pin is the data strobe of the parallel interface. during a write operation (r w =0), data on d[7:0] is sampled into the device. during a read operation (r w =1), data is output to d[7:0] from the device. wr /r w m16 i wr : write operation in parallel intel microprocessor interface mode, this pin is asserted low by the microprocessor to initiate a write cycle. data on d[7:0] is sampled into the device during a write operation. r w : read/write select in parallel motorola microprocessor interface mode, this pin is asserted low for write operation and high for read operation. d7 d6 d5 d4 d3 d2 d1 d0 p14 p13 r16 r15 r14 r13 t15 t14 i/o d[7:0]: data bus these pins function as a bi-directional data bus of the microprocessor interface. a7 a6 a5 a4 a3 a2 a1 a0 m14 m13 n16 n15 n14 n13 n12 p16 i a[7:0]: address bus these pins function as an address bus of the microprocessor interface. cs l13 i cs : chip select for each read or write operation, this pin must be changed from high to low, and remains low until the operation is over. int r12 open_drain int : interrupt request a low level on this pin indicates that an interrupt is pending inside the chip. sram interface emd7 emd6 emd5 emd4 emd3 emd2 emd1 emd0 d4 c4 b4 a4 d5 c5 b5 a5 i/o emd[7:0]: data bus data input/output pins for the external sram. used for data exchange between the IDT82V2608 and the external sram. table-1 pin description (continued) name pin number input/output description
pin description 16 december 4, 2006 IDT82V2608 inverse multiplexing for atm ema18 ema17 ema16 ema15 ema14 ema13 ema12 ema11 ema10 ema9 ema8 ema7 ema6 ema5 ema4 ema3 ema2 ema1 ema0 a6 c7 b7 a7 c8 b8 a8 a9 b9 c9 a10 b10 c10 a11 b11 c11 d11 a12 b12 o ema[18:0]: address bus address of the external sram. used to select a data entry in the external sram. em_we d6 o em_we : write enable write enable signal for the external sram. when em_we pin and em_cs pin are both low, data can be written to the external sram. em_oe b6 o em_oe : output enable output enable signal for the external sram. when em_oe pin and em_cs pin are both low, data can be read from the external sram. em_cs c6 o em_cs : chip select chip enable signal for the external sram. jtag & scan interface tck c2 i tck: jtag test clock this pin is the input clock for jtag. tms b1 i tms: jtag test mode select this pin has an internal pull-up resistor. tdi b2 i tdi: jtag test data input this pin is used to load instructions and data into the test logic and has an internal pull-up resistor. tdo d2 high-z tdo: jtag test data output this is normally high impedance and is used to read all the serial configuration and test data from the test logic. trst c1 i trst : jtag test port reset this pin has an internal pull-up resistor. power supplies and grounds vdd d7,d10,e3,f4,g4,g13, k4,k13,l4,m4,n4,n5, n6,n7,n10,n11,p3, p12,r1,t2 - 3.3v power supply gnd a1,a16,d8,d9,g7,g8, g9,g10,h4,h7,h8,h9, h10,h13,j4,j7,j8,j9, j10,j13,k7,k8,k9, k10,n8,n9,t1,t16 - ground table-1 pin description (continued) name pin number input/output description
pin description 17 december 4, 2006 IDT82V2608 inverse multiplexing for atm others ic l16 - ic: internal connected internal use. for normal operation, these pins should be connected to vdd. ic a2,a3,b3,c3,d3,l15, p11,t12 - ic: internal connected internal use. for normal operation, these pins should be connected to ground. ic k14,k15,k16,l14 - ic: internal connected internal use. for normal operation, these pins should be left open. nc d1,r2,t13 - nc: no connection table-1 pin description (continued) name pin number input/output description
interface 18 december 4, 2006 IDT82V2608 inverse multiplexing for atm 3interface 3.1 utopia interface the utopia interface operates in level 2 mode. the IDT82V2608 supports up to 8 utopia level 2 por ts. each port is assigned an address ranging from 0 to 30. the address value of 31 is reserved and should not be used. all the 31 ports can be individually enabl ed or disabled by configutopiaif command. each ima group or uni link corresponds to a port. for each ima group, the port address can be assigned by configgroupinterface command. for each uni link, the port address can be assigned by configunilink command. inside the device, each port corresponds to a gcf (group cell fifo) which is 2 cells deep. the IDT82V2608 uses cell level handshake for cell transfer. one entire cell is transferred before anot her port can be selected. the start of a cell is marked by txsoc and rxsoc signals in the transmit and the receive directions respectively. t hese two signals are active during the first byte of a cell. 3.1.1 utopia loopback function for diagnostic purpose, the capability to loop back all utopia traffic to utopia bus is provided. this l oopback is called utopia loopback and can be enabled by configloopmode command. in this mode, cells are taken from tgcfs (transmit group ce ll fifo) and sent to the respec- tive rgcfs (receive group cell fi fo). when in utopia loopback mode, cells will not be transmitted to the line interface. refer to figure-3 . figure-3 utopia loopback utopia interface tx group cell fifo 1 rx group cell fifo 1 tx group cell fifo 0 rx group cell fifo 0 ??
interface 19 december 4, 2006 IDT82V2608 inverse multiplexing for atm 3.2 line interface 3.2.1 line interface work modes for different framers, the line inte rface can be configured to different work mode to adapt to different data format. figure-4 shows all the 16 work modes and table-2 lists ima layer data rate for each mode. in channelized mode, all the framing bits and signalling bits are set to zero in transmit direction. and all the received signalling bits and framing bits are discarded in receive direct ion. in unchannelized mode, all bits are utilized for data transfer. work mode is selected by addtxlink or addrxlink command when a link is in an ima group. the work mode is selected by configu- nilink command when a link is used as a uni link. figure-4 line interface work modes t1 e1 non- multi-rate multi-rate t1 map to e1 non- multi-rate multi-rate 2 mb/s g.802 mapping spaced mapping 1.5 mb/s interface mode unchannelized channelized channelized 2 mb/s mo de 1 mo de 2 mode11 mode12 1.5 mb/s unchannelized mo de 0 isdn mode nor mal mode data rate ima to framer interface rate mo de 3 mo de 4 isdn mode normal mode mo de 5 mo de 6 isdn mode normal mode 8 mb/s four channel g.802 mapping spaced mapping mo de 7 mo de 8 isdn mode nor mal mode mo de 9 mode10 isdn mode normal mode 2 mb/s signalling mode no r ma l mode 8 mb/s signalling mode normal mode mode13 mode14 mode15 mode name
interface 20 december 4, 2006 IDT82V2608 inverse multiplexing for atm 3.2.1.1 mode0 in this mode, the transmit and rece ive data are viewed as a contin- uous 1.544 mb/s serial stream. there is no concept of time slot in an unchannelized link. each eight bits ar e grouped into an octet with arbi- trary alignment. the first bit receiv ed/transmitted is the most significant bit of an octet while the last bit is the least significant bit. the 1.544 mhz data stream clock is provided by the system. the 1.544 mhz clock in tx and rx directions can be either common clock or independent clock. if common clock is used, tscck and rscck are used as tx clock and rx clock respectively, and tscfs and rscfs are used as common frame pulse in tx and rx directions respectively. if independent clock is used, tsck[i] and rsck[i] are used as tx clock and rx clock respectively, and tsf[i] and rsf[i] are used as the frame pulse in tx and rx directions respectively. 3.2.1.2 mode1~mode4 in these four modes, the transmit/r eceive data rate is t1 channelized while the line interface timing clock is 2.048 mhz (e1 clock). thus the mapping between t1 frame and e1 frame is needed. two mapping modes can be used: g.802 mapping mode and spaced mapping mode. each mapping mode can be further divided into two data modes: t1 isdn mode and t1 normal mode. th e mapping is done in a frame-by- frame fashion and the unassigned time slots are set to zero. in these modes, the clock for tx and rx can be either common clock or independent clock. if common clock is used, tscck and rscck are used as tx clock and rx clock respectively, and tscfs and rscfs are used as common frame pulse in tx and rx directions respectively. if independent clock is used, tsck[i] and rsck[i] are used as tx clock and rx clock respectively, and tsf[i] and rsf[i] are used as the frame pulse in tx and rx directions respectively. g.802 mapping this mode supports itu-t recomm endation g.802, which describes how 24 (or 23, in signalling mode) t1 time slots and one framing bit (totally 193/185 bits per t1/t1-is dn frame) are mapped to 32 e1 time slots (256 bits). this mapping is done by mapping the 24 (or 23 in t1- isdn mode) t1 time slots to ts1~ts15 and ts17~ts25 (or ts17~ts24), and mapping the framing bit to bit 1 of ts26/ts25. ts0, ts16, ts27/ts26 through ts31 are all unassigned and set to zero (refer to figure-5 ). table-2 data rates of different modes mode ima data rate per channel (maximum) interface clock (maximum) mode0 1.544 mb/s 1.544 mhz mode1 1.472 mb/s 2.048 mhz mode2 1.536 mb/s 2.048 mhz mode3 1.472 mb/s 2.048 mhz mode4 1.536 mb/s 2.048 mhz mode5 1.472 mb/s 1.544 mhz mode6 1.536 mb/s 1.544 mhz mode7 1.472 mb/s 8.192 mhz mode8 1.536 mb/s 8.192 mhz mode9 1.472 mb/s 8.192 mhz mode10 1.536 mb/s 8.192 mhz mode11 2.048 mb/s 2.048 mhz mode12 1.920 mb/s 2.048 mhz mode13 1.984 mb/s 2.048 mhz mode14 1.920 mb/s 8.192 mhz mode15 1.984 mb/s 8.192 mhz
interface 21 december 4, 2006 IDT82V2608 inverse multiplexing for atm figure-5 g.802 mapping mode spaced mapping in this mode, t1 to e1 mapping ma kes every fourth time slot unas- signed (i.e., 4, 8, 12, 16, 20, 24 and 28). refer to figure-6 . suppose t1 time slot x is mapped to e1 time slot y. we have y=x+int((x-1)/3), where int(n) is the largest integer no great er than n. the framing bit is assigned to the first bit of ts0. this distribution of unassigned time slots averages out the idle time slots and optimizes the framer?s slip buffer?s usage. figure-6 spaced mapping mode 1.5 m t1 stream 2 m e1 stream f a 1 2 14 15 16 17 18 23 24 f b 1 2 23 24 f c 1 2 0 1 14 15 16 17 18 2 24 25 26 27 28 31 0 1 2 f b x x x x x x x e1 framing time slot e1 signalling time slot u u uu uu u frame a frame b 1. x=unused bit 2. u=unassigned time slot 3. f a , f b and f c are t1 framing bits for frame a, b and c respectively. 1.5 m t1 stream 2 m stream f a 1 2 5 6 7 8 9 23 24 f b 1 2 23 24 f c 1 2 0 1 7 8 9 2 27 28 31 31 frame a frame b 1. x=unused bits 2. u=unassigned time slot 3. f a , f b and f c are t1 framing bits for frame a, b and c respectively. 4. mapping rule: if t1 time slot x is mapped to e1 time slot y, y = x+int(x/3). here int(n) is the largest integer no greater than n. 3 3 f b x x x x x x x 0 1 2 f a x x x x x x x 4 5 4 u 6 30 29 u 22 u
interface 22 december 4, 2006 IDT82V2608 inverse multiplexing for atm t1 isdn mode the t1 isdn mode corresponds to the use of 23 time slots to transmit data, that is, t1 data is not transmitted during the framing bit and time slot 24. therefore, only 23 time slots are considered useful and are mapped while time slot 24 and the framing bit are meaningless and are not mapped. t1 normal mode in this mode, data is not transmitt ed during the framing bit. the other 24 time slots are useful. 3.2.1.3 mode5~mode6 in these modes, the transmit/receive data rate is t1 channelized, and the line interface timing clock is 1.544 mhz (t1 clock). the isdn mode and normal mode are defined in t1 isdn mode and t1 normal mode on page 22 . in these modes, the clock for tx and rx can be either common clock or independent clock. if common clock is used, tscck and rscck are used as tx clock and rx clock re spectively, and tscfs and rscfs are used as common frame pulse in tx and rx directions respectively. if independent clock is used, tsck[i] and rsck[i] are used as tx clock and rx clock respectively, and tsf[i] and rsf[i] are used as the frame pulse in tx and rx directions respectively. 3.2.1.4 mode7~mode10 in these modes, only tscck and rscck are used to input the 8.192 mhz clock in tx and rx directions respectively, and tscfs and rscfs are used as common frame pulse in tx and rx directions respectively. all the tsck[i], tsf[ i], rsck[i] and rsf[i] pins are not used and should be connected to groun d. the unused rsd pins should also be connected to ground. the data pins used for multiplexing are shown in the table below: multi-rate multi-rate is used for multiplexi ng four e1 streams into one high- speed stream. figure-7 shows four 2.048 mhz e1 streams multiplexed into a single 8.192 mhz stream th rough one data pin. the multiplexing uses the round-robin technology. the system provides 8.192 mhz common clock and 8 khz common frame pulse. for t1 channel, before multiplexing, a mapping from each t1 frame to e1 frame is first done. then the mapped 4 e1 channels are multi- plexed into one 8.192 mhz stream as shown in figure-7 . figure-7 multiplexing f our 2 mhz streams into one 8 mhz stream t1 multi-rate mode since there are two t1 to e1 mapping methods that can be used as described in g.802 mapping and spaced mapping on page 20 , two new modes can be derived when multiplexing is further used. again, t1 isdn data mode and t1 normal mode can be applied, thus we have 4 more modes: mode7~mode10. 3.2.1.5 mode11 in this mode, the transmit and rece ive data are viewed as a contin- uous 2.048 mb/s serial stream. there is no concept of time slot in an unchannelized link. each eight bits are grouped into an octet. tsf or tscfs signal determine whether the data stream is in byte alignment or not. the first bit received/transmitted is the most significant bit of an octet while the last bit is the l east significant bit. the 2.048 mhz data stream clock is provided by the system. in this mode, the clock for tx and rx can be either common clock or independent clock. if common clock is used, tscck and rscck are used as tx clock and rx clock res pectively. if independent clock is used, the clock for the i-th link comes from tsck[i] and rsck[i] in tx and rx directions respectively. in common clock mode, the tscfs signal is used for byte align- ment pulse for the transmitted bit stream while in independent clock mode, the tsf[i] signal is used for byte alignment pulse for the i-th transmit link. the frequency for tsf[i] (or tscsf) is the result of tsck[i] (or tscck) divided by 256 and the pulse wi dth of this signal is one cycle of tsck[i] or tscck signal. 3.2.1.6 mode12~mode13 these two modes are e1 non-multi- rate combined with different signalling modes. the non-multi-rate is the channelized generic e1 inter- face, i.e., a 2.048 mhz channel is divided into 32 sub-channels (also called time slots), and these sub- channels are used to exchange data. in these modes, the clock for tx and rx can be either common clock or independent clock. if common clock is used, tscck and rscck are used as tx clock and rx clock respectively, and tscfs and rscfs are used as common frame pulse in tx and rx directions respectively. if independent clock is used, tsck[i] and rsck[i] are used as tx clock and rx clock respectively, and tsf[i] and rsf[i] are used as the frame pulse in tx and rx directions respectively. table-3 pins used in mu lti-rate multiplex mode tx pin name rx pin name multiplexed channel tsd[1] rsd[1] channel 1~channel 4 tsd[2] rsd[2] channel 5~channel 8 0 1 2 3 4 5 6 7 8 9 10 11 byte0 byte1 byte2 byte0 byte1 byte2 byte0 byte1 byte2 byte0 byte1 byte2 1st 2 mbps stream 2nd 2 mbps stream 3rd 2 mbps stream 4th 2 mbps stream 8 mbps stream
interface 23 december 4, 2006 IDT82V2608 inverse multiplexing for atm channelized non-multi-rate e1 in this mode, the system provi des 2.048 mhz clock and 8 khz frame pulse for e1 bit stream exchange between the IDT82V2608 and the line interface. the e1 time slot 0 is not used for data exchange while time slot 16 may or may not be used for data exchange, depending on signalling or non-signalling mode. signalling and non-signalling in signalling mode, time slot 0 and time slot 16 are not used for data exchange between the IDT82V2608 and the line interface. in non- signalling mode, only time slot 0 is not used for data exchange. 3.2.1.7 mode14~mode15 the multi-rate concept is defined in multi-rate on page 22 , and the signalling and non-signalling concepts are defined in signalling and non-signalling on page 23 . the system provides 8.192 mhz common clock and 8 khz common frame pulse. in these modes, only the tscck and rscck pins are used to input the 8.192 mhz clock in tx and rx directions respectively, and tscfs and rscfs are used as common frame pulse in tx and rx directions respectively. the tsck[i], tsf[i], rs ck[i] and rsf[i] pins are not used and should be connected to ground. the unused rsd pins should also be connected to ground. the data pins used for multiplexing are shown in table-3 . 3.2.2 line interface timing clock modes two timing clock modes can be se lected. one is common clock mode, the other is independent clock mode. the timing clock mode can be individually configured for each link. in ima mode, addtxlink command and addrxlink command can be used to configure the clock mode in the transmit and receive dire ctions respectively. in uni mode, configunilink command can be used to configure the clock mode. if a link is configured in co mmon clock mode, tscck and rscck are used as tx clock and rx clock respectively, and tscfs and rscfs are used as common frame pulse in tx and rx directions respectively. if a link is configured in independent clock mode, tsck[i] and rsck[i] are used as tx clock and rx clock respectively, and tsf[i] and rsf[i] are used as the frame pulse in tx and rx directions respectively. these two timing clock modes can be configured at the same time, i.e., some links can work in common clock mode while other links can work in independent clock mode. the line interface mode7~mode10 and mode14~mode15 cannot be used in independent clock mode. 3.2.3 line interface loopback function the line interface supports two line loopback functions, one is external loopback mode and the other is internal loopback mode. the two loopback modes can be selected by configloopmode command. in external loopback mode, all the data received at the line side is looped back to the transmit side and is transmitted out. when this func- tion is enabled, all the links will be in external loopback mode. data will not be transmitted to the utopia interface. in internal loopback mode, the data tr ansmitted are also sent to the receive side. when this function is enabled, all the links will be in internal loopback mode. data will not be transmitted to the fe utopia interface.
interface 24 december 4, 2006 IDT82V2608 inverse multiplexing for atm 3.3 external microprocessor interface the IDT82V2608 uses an embedded controller and a downloaded software (imaos08 or imaos08_slave 1 ) to communicate with the external microprocessor. the exte rnal microprocessor sends commands to configure the device and r ead feedbacks. the downloaded software interprets these commands and the embedded controller executes these commands. this relieves program mers from accessing vast regis- ters. just by accessing a few regi sters, programmers can use a set of well-defined commands to communicate with IDT82V2608. 3.3.1 external microproc essor interface selection the IDT82V2608 supports both non-multiplexed intel and non-multi- plexed motorola microprocessor inte rfaces. for intel microprocessor interface, the mpm pin should be conn ected to vdd; for motorola micro- processor interface, the mpm pin should be connected to ground. 3.3.2 command fifos the embedded controller uses two fifos to communicate with the external microprocessor. one is inpu t fifo, which is used to receive commands and data from the external microprocessor; the other is output fifo, which is used to send data to the external microprocessor. the lengths of these two fifos are both 16 bytes. these two fifos can only be accessed through registers. 3.3.3 registers the IDT82V2608 provides 9 regist ers for the external micropro- cessor to load software to the device, send commands and read feed- backs. 3.3.4 register map 1. imaos08 is used when the device is in normal communication while imaos08_slave is used when the device operates in slave mode. refer to 8.1 group auto detect . table-4 register map address (hex) register r/w map b7 b6 b5 b4 b3 b2 b1 b0 00 input_fifo_length_reg r/w - - - input_message_length[4:0] 01 output_fifo_length_r eg r - - - output_message_length[4:0] 02 output_fifo_data_reg r output_data[7:0] 03 input_fifo_data_reg r/w input_data[7:0] 04fifo_int_enable_regr/w-----input_fifo_ empty_int_en input_fifo_ov erflow_int_en output_fifo_msg _available_int_en 05 fifo_state_reg r hw_version input_fifo_ empty_state input_fifo_ov erflow_state output_fifo_msg _available_state 06 fifo_int_reset_reg w ----- -input_fifo_ov erflow&empty_i nt_rst output_fifo_msg _available_int_rst 07 output_fifo_internal_ state_reg r - - - output_remain_msg_length[4:0] 08 input_fifo_internal_st ate_reg r - - - input_remain_msg_length[4:0]
interface 25 december 4, 2006 IDT82V2608 inverse multiplexing for atm 3.3.5 register description table-5 input fifo data length register (input_fifo_length_reg) (r/w, address=00h) symbol position default description - 7-5 0 reserved. input_message_length[4:0] 4-0 0 these 5 bits contain the message length in the input fifo which should be written after the mes- sage is sent to the input fifo. the valid length is from 0 to 16 bytes. table-6 output fifo data length register (output_fifo_length_reg) (r, address=01h) symbol position default description - 7-5 0 reserved. output_message_length[4:0] 4-0 0 these 5 bits contain the length of the message in the output fifo. valid length is from 0 to 16 bytes. table-7 output fifo data register (output_fifo_data_reg) (r, address=02h) symbol position default description output_data[7:0] 7-0 0 these bits contain the data from the message output fifo. the complete message can be retrieved by continuously reading this register. table-8 input fifo data register (input_fifo_data_reg) (r/w, address=03h) symbol position default description input_data[7:0] 7-0 0 these bits contain data to be sent to the input fifo. by continuously writing to this register, a complete message can be sent. before the message is sent, the input_fifo_empty_state bit in the ep_interrupt status register should be polled to see whether the input fifo is available for writing. after the message is sent, the message length should be written to the ep_tx_length reg- ister.
interface 26 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-9 fifo interrupt enable register (fifo_int_enable_reg) (r/w, address=04h) symbol position default description - 7-3 0 reserved. input_fifo_empty_int_en 2 0 input fifo empty interrupt enable 0: interrupt disabled 1: interrupt enabled input_fifo_overflow_int_en 1 0 input fifo overflow interrupt enable 0: interrupt disabled 1: interrupt enabled output_fifo_msg_available_int_en 0 0 output fifo message available interrupt enable 0: interrupt disabled 1: interrupt enabled table-10 fifo interrupt status register (fifo_state_reg) (r, address=05h) symbol position default description hw_version 7-3 1 current device version. for revision a and b, these bits are ?0000?. for revision c, these bits are ?0001?. input_fifo_empty_state 2 1 input fifo availability status 0: input fifo is not available for writing. 1: input fifo is available for writing. input_fifo_overflow_state 1 0 input fifo overflow status 0: input fifo is not full. 1: input fifo is full. output_fifo_msg_available_state 0 0 output fifo message availability status 0: no message is in the output fifo. 1: a message is in the output fifo. table-11 fifo interrupt reset register (fifo_int_reset_reg) (w, address=06h) symbol position default description - 7-2 0 reserved. input_fifo_overflow&empty_int_rst 1 0 write ?1? to clear the input_ fifo_overflow_state status and input_fifo_empty_state status. output_fifo_msg_available_int_rst 0 0 write ?1? to clear the output_fifo_msg_available_state status. table-12 output fifo internal state re gister (output_fifo_internal_state_reg) (r, address=07h) symbol position default description - 7-5 0 reserved. output_remain_msg_length[4:0] 4-0 0 the length of the message remaining in the output fifo to be read by the external microproces- sor.
interface 27 december 4, 2006 IDT82V2608 inverse multiplexing for atm 3.3.6 procedure of loading software and sending commands after chip reset, the imaos08 or imaos08_slave (a binary file shipped with the chip) should be loaded to the IDT82V2608 to interpret commands. the procedure of loadi ng the imaos08 or imaos08_slave is the same with that of sending the commands. figure-8 shows the input-fifo write process and figure-9 shows the output-fifo read process. figure-8 input fifo write process table-13 input fifo intern al state register (input _fifo_internal_state_reg) (r, address=08h) symbol position default description - 7-5 0 reserved. input_remain_msg_length[4:0] 4-0 0 the length of the message remaining in the input fifo to be processed by the IDT82V2608. write_message(char *message,char l) { wait(input_fifo_empty_state_event); write_reg(fifo_int_reset_reg,0x02); for(i=0;i interface 28 december 4, 2006 IDT82V2608 inverse multiplexing for atm figure-9 output fifo read process read output_fifo_msg_available_state bit of fifo_state_reg register read message length l from output_fifo_length_reg register n y read_message(char *message,char *l) { wait(output_fifo_msg_available_state_event); write_reg(fifo_int_reset_reg,0x01); *l = 0x1f&(read_reg(output_fifo_length_reg)); for(i=0;i<*l;i++) { message[i] = read_reg((output_fifo_data_reg); } } output fifo read process clear the output_fifo_msg_available_state bit read l bytes from output_fifo_data_reg register output_fifo_msg_ available_state bit is set?
interface 29 december 4, 2006 IDT82V2608 inverse multiplexing for atm 3.4 sram interface the sram interface has an 8-bit wide data bus, emd[7:0], and a 19- bit wide address bus, ema[18:0]. the minimum throughput is 4 mbyte/s and the minimum access time is 40ns. when both em_we pin and em_cs pin are low, data can be written to the external sram. when both em_oe pin and em_cs pin are low, data can be read from the external sram. the size of the sram can be selected from 2k byte to 512 kbyte. when the minimum 2k byte memory is selected, only 11 address pins will be used. different memory size will affect different delay compensa- tion capability. table-14 and table-15 show memory size vs. maximum delay tolerance in t1 and e1 unchannelized modes respectively. table-14 maximum delay tolerance value for diffe rent sram size in t1 unchannelized mode sram used (kbyte) maximum delay tolerance (ms) address bus used 512 281 ema[18:0] 256 141 ema[17:0] 128 70 ema[16:0] 64 35 ema[15:0] 32 17.58 ema[14:0] 16 8.79 ema[13:0] 8 4.39 ema[12:0] 4 2.20 ema[11:0] 2 1.10 ema[10:0] table-15 maximum delay tolerance value for diffe rent sram size in e1 unchannelized mode sram used (kbyte) maximum delay tolerance (ms) address bus used 512 212 ema[18:0] 256 106 ema[17:0] 128 53 ema[16:0] 64 26.5 ema[15:0] 32 13.25 ema[14:0] 16 6.625 ema[13:0] 8 3.31 ema[12:0] 4 1.66 ema[11:0] 2 0.83 ema[10:0]
ima and uni functions 30 december 4, 2006 IDT82V2608 inverse multiplexing for atm 4 ima and uni functions 1 the IDT82V2608 is capable of combining the transport bandwidth of multiple links into one single logical link. the logical link is called a group. the IDT82V2608 supports up to 4 independent groups with each group capable of supporting from 1 to 8 links. links that are assigned to an ima group are called in ima mode while links that are not assigned to any ima group can be used in uni mode. 4.1 ima mode 4.1.1 ima frame an ima frame is defined as m c onsecutive cells, numbered from 0 to m-1 on each link, across all the links in an ima group. it is generated by inserting an icp cell after every m-1 cells per link. values of m supported are 32, 64, 128 and 256, which can be programmed for all the links in a group by configgrouppara command. the icp cell occurs within the frame at the icp cell offset positi on and should be at the same position throughout the frame. the icp offs et is programmable on a per-link basis by addtxlink command. 4.1.2 trl (timing reference link) within an ima group, a trl should be selected to pass synchroniza- tion from the transmit to the receive end. the trl can be selected by configtrllink command. 4.1.3 stuffing mode the insertion of stuff cells is to compensate for timing differences between links within an ima group. there are two kinds of stuffi ng method: ctc (common transmit clock) mode and itc (independent trans mit clock) mode. the stuffing method is selected by configgroupworkmode command. in ctc mode, a stuff cell is added after every 2048 icp, filler and atm layer cells. the stuff cell is generated by repeating the icp cell. both the icp cell and the stuff cell ar e identified as icp cells via the link stuff indication (lsi) field of the icp cell. the stuff cell event will occur on the same frame on all the links. however, the pre-defined icp offset will determine at which cell in t he frame the stuff event will occur. in itc mode, a stuff cell is added to the trl the same way as in ctc mode, that is, it is added after every 2048 icp, filler and atm layer cells. on all other links in the group, stuff cells are added as necessary to compensate for timing differences between the trl and other links of the group. in an ima group, if at least one of the links uses independent clock pin as its clock input, stuff mode c an only be set as itc. if all the links within the group use common clock pin (i.e., tscck and rscck) as their clock input, stuff mode can be set as either ctc or itc. for details about the two clock modes, please refer to 3.2.2 line interface timing clock modes . 4.1.4 link backup the group link backup function is used to add a link to the group for backup in case of link failure. this function is only enabled when the device is working in symmetry mode. the link to be added to the group is specified as backup link or non- backup link in ?addlink? command (i.e., addtxlink and addrxlink commands). note that only one back up link is supported in each group. if several links are specified as backup links, only the last added backup link is regarded as a backup link. when a link failure event occurred, the IDT82V2608 will automati- cally pick up a backup link and activate it. 4.2 uni mode configdev command and configunilink command are used to configure a uni link. configdev command can be used to configure tc work mode, tc alpha and delta value and lcd threshold. configu- nilink command can be used to configure link physical id, tx and rx utopia port, line interface work mode and clock mode. when a link is configured in uni mode, ima functions are bypassed. atm cells are simply transmitted from the utopia interface to the line interface. 1. chapter 4, 5, 6 and 7 are specific to imaos08. details about imaos08_slave are provided in chapter 8.
programming information for imaos08 31 december 4, 2006 IDT82V2608 inverse multiplexing for atm 5 programming information for imaos08 5.1 command types there are three types of messages: 1.command message (external mpu ? embedded controller) 2.reply message (embedded controller ? external mpu) 3.notification message (embedded controller ? external mpu) the formats of the three types of messages are different. 5.1.1 command message figure-10 command message format command handler from 0~126 defined by user?s driver. it is the sequence number of the sent message. command type the encoding of the command. refer to 5.2 command encoding . command parameters the parameters of the command. 5.1.2 command reply message figure-11 command reply message format command reply handler the original command handler plus 128. command replies the replies of the original command. 5.1.3 alarm message figure-12 alarm message format alarm handler ffh. link id /group id the link id or group id. alarm type the sequence in table-53 failure/alarm signals on page 72 . 1 byte 1 byte at most 14 bytes command handler command type command parameters 1 byte at most 14 byte command reply handler command replies 1 byte 1 byte 1 byte alarm handler link id /group id alarm type
programming information for imaos08 32 december 4, 2006 IDT82V2608 inverse multiplexing for atm 5.2 command encoding table-16 command encoding (1) command encoding command name 01h configdev 03h configutopiaif 04h configloopmode 05h configgrouppara 06h configgroupinterface 07h configgroupworkmode 08h configgsmtimers 09h configtrllink 0ah configifsmpara 0bh addtxlink 0ch addrxlink 0dh configunilink 0eh startgroup 0fh startlasr 10h inhibitgrp 11h notinhibitgrp 12h restartgrp 13h deletegrp 14h recoverlink 15h deletelink 16h deactlink 17h getgroupstate 18h getgroupdelayinfo 19h getlinkstate 1ah getgrpperf 1bh getlinkperf 1ch getconfigpara 1dh getgrpworkingpara 1eh getlinkworkingpara 1fh starttestpattern 20h getloopedtestpattern 21h stoptestpattern 22h getversioninfo 1. imaos will be in unknown state if the user sends a value not list ed in this table.
programming information for imaos08 33 december 4, 2006 IDT82V2608 inverse multiplexing for atm 5.3 command description each command description contai ns two parts: command parame- ters and command reply. in the command parameters part, a figure is used to illustrate the byte sequence of the parameters. all the parameter descriptions are listed below the figure. in the command reply part, another figure is used to illustrate the reply sequence in the reply message. the reply description is li sted below the figure. for detailed information about the packet of command message and reply message, refer to page 31 . table-17 configdev comm and (encoding: 01h) this is the first command to be issued. if this command is not issued, the default value will be used. command parameters byte sequence parameter name default description 1-2 sysclk 4e20h sysclk=frequency of system clock (hz)/1000. fo r example, if the system clock is 20 mhz, this value would be 20000. unit: sys-ticks in 1 ms (msb first) note: wrong configuration will make imaos?s timer work improperly. 3t in 2h timer of entering failure alarm state. when a defect persists for a period set by this timer, the IDT82V2608 will enter failure alarm state. unit: 1 s 4t exit 0ah timer of exiting failure alarm state. if a defect no longer exists for a period set by this timer, the IDT82V2608 will exit failure alarm state. unit: 1 s 5 no 0h reserved. write 0 to this field. 6 tcworkmode 7h 7 tcalpha&delta 67h alpha value is the number of consecutive incorrect hec fields for the rx cell synchronization state machine to exit sync state. delta value is the number of consecutive correct hec fields for the rx cell synchronization state machine to enter sync state. 1-2345678 sysclk t in t exit no tcworkmode tcalpha&delta tclcd_threshold bit position description 7~3 don?t care 2 1: enable tx tc scrambling (default); 0: disable tx tc scrambling 1 1: enable rx tc hec erro r correct control (default); 0: disable rx tc hec error correct control 0 1: enable rx tc de-scrambling (default); 0: disable rx tc de-scrambling bit position description 7-4 delta value. valid is 0~15. 3-0 alpha value. valid is 0~15.
programming information for imaos08 34 december 4, 2006 IDT82V2608 inverse multiplexing for atm 8 tclcd_threshold 68h 0~255 lcd threshold. if the ocd anomaly persists for the time set by this parameter, lcd defect will be reported. unit: one cell?s transmission time command reply byte sequence reply name description 1 ack 0: ok; 1: invalid parameter (length of the command is incorrect); others: internal error. the chip should be reset. table-17 configdev command (e ncoding: 01h) (continued) 1 ack
programming information for imaos08 35 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-18 configutopiaif command (encoding: 03h) command parameters byte sequence parameter name default description 1-4 tx utopia port enable 00000000h every bit of the 4 bytes enables a utopia tx port (msb byte first, lsb byte last). 0: disable the port; 1: enable the port this 4 bytes parameter enables or disables each of the 31 utopia port (port 31 is reserved and should not be used). the 4 bytes can be regarded as a sequence of 32 bits. the most significant bit in byte 1 (the first byte sent to embedded controller) is bit 31. the least significant bit of byte 4 (the last byte sent) is bit 0. 5-8 rx utopia port enable 00000000h every bit of the 4 bytes enables a utopia rx port (msb byte first, lsb byte last). 0: disable the port; 1: enable the port the meaning of this parameter is similar to the utopia tx port enable field. see above. command reply byte sequence reply name description 1 ack 0: ok; 1: invalid parameter (length of the command is incorrect); others: internal error. the chip should be reset. 1-4 5-8 tx utopia port enable rx utopia port enable 1 ack
programming information for imaos08 36 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-19 configloopmode command (encoding: 04h) command parameters byte sequence parameter name default description 1 loop mode 0h 0: disable all the loopback functions; 1: enable line interface internal loopback mode; 2: enable line interface external loopback mode; 3: enable utopia loopback mode; others: the same as 0. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter (length of the command is incorrect); others: internal error. the chip should be reset. 1 loop mode 1 ack
programming information for imaos08 37 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-20 configgrouppara command (encoding: 05h) this is the first command to configure a physical group. other configuration commands prior to this command would make the grou p work improperly. command parameters byte sequence parameter name default description 1 group id na (not avail- able) the physical group id (0~3) this is the physical identification of an ima group. each group id is unique in the IDT82V2608 and should not be equal to any channel id that has been assigned to a uni link. there are altogether 4 phys- ical groups. this group id can be any value from 0~3. note that this group id is not the same as ima id which is used to identify a logical ima group and can be any value from 0~255. 2 ne ima id 0h 0~255 this is the logical id of a physical ima group, which is packaged in icp cells and is sent to the fe to indi- cate which group a link belongs to. 3 m for tx (m tx ) 0h 0: 32 (default); 1: 64; 2: 128; 3: 256 this is the ima frame length that this group will use at the transmit end. there are altogether 4 frame lengths that can be selected: 32, 64, 128 and 256. note: m tx must be right, otherwise imaos will work improperly. 4 acceptable m for rx (m rx ) na this is the acceptable ima frame length of the receive end. note: m rx must be right, otherwise imaos will work improperly. 5-6 max delay compen- sation value na 0~1024 cells this is the maximum cells delay that can be tolerated. this value is constrained by the size of the external sram and it shall be no more than 1024 cells. refer to 3.4 sram interface . note: if the value exceeds 1024, imaos will work improperly. 7 version backward compatibility na 0: no; 1: yes version backward compatibility indicates whether versio n 1.0 is supported when the fe?s group is using ima 1.0. by default, the chip works in version 1.1 and does not support backward compatibility. 12345-67 89 group id ne ima id m for tx (m tx ) acceptable m for rx (m rx ) max delay com- pensation value version backward compatibility p tx p rx bit meaning 3 1: accept m=256 0: do not accept m=256 2 1: accept m=128 0: do not accept m=128 1 1: accept m=64 0: do not accept m=64 0 1: accept m=32 0: do not accept m=32
programming information for imaos08 38 december 4, 2006 IDT82V2608 inverse multiplexing for atm 8p tx na 1~8 the minimum number of active tx links for the gsm to move to operational state. this implies that the tx links to be configured should be no less than this number. note: if this value is larger than the link numbers that will be added later, this ima group?s state machine will stop at insufficient-link state. 9p rx na 1~8 the minimum number of active rx links for the gsm to move to operational state. this implies that the rx links to be configured should be no less than this number. in scso mode, if p rx is not equal to p tx , p tx is used as p rx . note: if this value is larger than the link numbers that will be added later, this ima group?s state machine will stop at insufficient-link state. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter; others: internal error. the chip should be reset. table-20 configgrouppara comman d (encoding: 05h) (continued) 1 ack
programming information for imaos08 39 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-21 configgroupinterfa ce command (encoding: 06h) this command should follow the configgrouppara command. command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). this is the same group id in configgrouppara command. 2 tx utopia port 1fh 0~30 the utopia port address for data transmit. port 31 is reserved and should not be used. note: the upper 3 bits are don?t care. 3 rx utopia port 1fh 0~30 the utopia port address for data receive. port 31 is reserved and should not be used. note: the upper 3 bits are don?t care. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter; 2: the physical group is not configurable (should issue configgrouppara command first); others: internal error. the chip should be reset. 123 group id tx utopia port rx utopia port 1 ack
programming information for imaos08 40 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-22 configgroupworkmode command (encoding: 07h) this should be the third command issued to configure a group, i.e., this command should follow configgroupinterface command. command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). this is the same group id in configgrouppara command. 2 symmetry mode na 0: scso (symmetrical c onfiguration and symmetrical operation); 1: scao (symmetrical configurat ion and asymmetrical operation); 2: acao (asymmetrical configuration and asymmetrical operation) note: value exceeding 2 will be regarded as 0. 3 stuff mode 1h 0: itc (independent transmit clock stuff insertion); 1: ctc (common transmit clock stuff insertion) if at least one of the links uses independent clock pin as its clock input, stuff mode can only be set as itc. if all the links within the group use common clock pin (i.e., tscck and rscck) as their clock input, stuff mode can be set as either ctc or itc. note: wrong configuration will lead to wrong icp cells. 4 stuff adv mode 1h 0: pre-notify the stuff event 1 frame ahead; 1: pre-notify the stuff event 4 frames ahead. icp stuff cell indication. it tells the fe the distance (unit is ima frame) between the current icp cell and the forthcoming stuff icp cell. note: the upper 7 bits are don?t care. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter; 2: the physical group is not configurable; others: internal error. the chip should be reset. 1234 group id symmetry mode stuff mode stuff adv mode 1 ack
programming information for imaos08 41 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-23 configgsmtimers command (encoding: 08h) command parameters byte sequence parameter name default description 1 group id na any value is ok. all the groups in the device share the same timer values. 2 timer for gsm start-up ack 4h 1~255 unit: 250 ms this timer will start when the gsm enters start-up ack state. if there is no response from the fe after a period set by this timer, the gsm will return from start-up ack to start-up state. if 0 is sent, it will be interpreted as 1*250 ms by the embedded controller. 3 timer for gsm configure abort 4h 1~255 unit: 250 ms this timer will start when the gsm enters start-up abort state. after a period set by this timer, the gsm will return to start-up state. if 0 is sent, it will be interpreted as 1*250 ms by the embedded controller. 4 timer for gsm to report rx=active 4h 1~255 unit: 250 ms this timer will start when all the rx links are reported usable. if either all the configured links are being reported tx=usable by the fe or the timer expires, all the rx links will be brought to active state. if 0 is sent, it will be interpreted as 1*250 ms by the embedded controller. 5 timer for gsm to report tx=active 4h 1~255 unit: 250 ms this timer will start when all the tx links are reported usable. if either all the configured links are being reported rx=active by the fe or the timer expires, all the tx links will be brought to active state. if 0 is sent, it will be interpreted as 1*250 ms by the embedded controller. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter; 2: the physical group is not configurable; others: internal error. the chip should be reset. 12345 group id timer for gsm start- up ack timer for gsm con- figure abort timer for gsm to report rx=active timer for gsm to report tx=active 1 ack
programming information for imaos08 42 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-24 configtrllink co mmand (encoding: 09h) command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). this is the same group id in configgrouppara command. 2txtrl0h0~7 the trl link selected for this group. data on tsd1 pin is deemed data on tx link 0; data on tsd2 pin is deemed data on tx link 1 and so on. this link should have been added to the group, otherwise the group will fail to start up. if the trl link has been configured previously, this command is used to change the trl link. command reply byte sequence reply name description ack 0: ok; 1: invalid parameter; 2: the physical group is not configurable; others: internal error. the chip should be reset. 12 group id txtrl 1 ack
programming information for imaos08 43 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-25 configifsmpara command (encoding: 0ah) command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). this is the same group id in configgrouppara command. 2 alpha&beta&gam ma 91h alpha value is the number of consecutive invalid icp cells for the ifsm state machine to exit sync state. beta is the number of consecutive errored icp cells for the ifsm state machine to exit sync state. gamma is the number of consecutive valid icp cells for the ifsm state machine to enter sync state. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter; 2: the physical group is not configurable; others: internal error. the chip should be reset. 12 group id alpha&beta&gamma bit meaning 7-6 alpha value. default is 2. 5-3 beta value. default is 2. 2-0 gamma value. default is 1. 1 ack
programming information for imaos08 44 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-26 addtxlink comm and (encoding: 0bh) command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). this is the same group id in configgrouppara command. 2 tx link physical id na 0~7 the tx link that will be configured to this group. data on tsd1 pin is deemed data on tx link 0; data on tsd2 pin is deemed data on tx link 1 and so on. note: if the value exceeds 7, imaos will work improperly. 3 tx line interface work mode 0fh mode0~mode15 line interface work mode for this link. note: if the value exceeds 15, imaos will work improperly. 4 tx line interface clock 0h 0: common clock mode; 1: independent clock mode line interface clock input mode. the line interface mode7~mode10 and mode14~mode15 cannot be used in independent clock mode. note: imaos does not check this value. value exceeding 1 will cause wrong configuration. 5 tx link logical id 0h 0~31 the logical tx link # designated to that physical link. it is used for tx icp cell. note: imaos does not check this value. if this value is wrong, imaos will work improperly. 6 tx link icp offset 0h the icp offset over that tx link the icp cell offset of the ima frame on that link. this value should be smaller than the tx frame length. note: if this value is wrong, imaos will work improperly. 7 backup function na 0: no; 1: yes whether this is a backup link or not. when other links failed, this link will be automatically added to the group. note1: only one backup link is supported in each group. if several links are specified as backup links, only the last added backup link is regarded as a backup link. note2: if a backup link is added after the startgroup or startlasr command, a startlasr command should be issued to make this backup link take effect. 1234567 group id tx link physical id tx line interface work mode tx line interface clock tx link logical id tx link icp offset backup function
programming information for imaos08 45 december 4, 2006 IDT82V2608 inverse multiplexing for atm command reply byte sequence reply name description ack 0: ok; 1: invalid parameter; 2: the physical group is not configurable; 3: tx physical link is used by other groups; 4: tx icp offset is larger than m; 5: link logical id is used by other links in this group; others: internal error. the chip should be reset. table-26 addtxlink command (e ncoding: 0bh) (continued) 1 ack
programming information for imaos08 46 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-27 addrxlink command (encoding: 0ch) command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). this is the same group id in configgrouppara command. 2 rx link physical id na 0~7 the rx link that will be configured to this group. data on rsd1 pin is deemed data on rx link 0; data on rsd2 pin is deemed data on rx link 1 and so on. note: if the value exceeds 7, imaos will work improperly. 3 rx line interface work mode 0fh mode0~mode15 line interface work mode for this link. note: if the value exceeds 15, imaos will work improperly. 4 rx line interface clock 0h 0: common clock mode; 1: independent clock mode line interface clock input mode. the line interface mode7~mode10 and mode14~mode15 cannot be used in independent clock mode. note: imaos does not check this value. value exceeding 1 will cause wrong configuration. 5 backup function na 0: no; 1: yes whether this is a backup link or not. when other links fail, this link will be automatically added to the group. note: only one backup link is supported in each group. if several links are specified as backup links, only the last added backup link is regarded as a backup link. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter; 2: the physical group is not configurable; 3: the rx physical link is used by other groups; others: internal error. the chip should be reset. 12345 group id rx link physical id rx line interface work mode rx line interface clock backup function 1 ack
programming information for imaos08 47 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-28 configunilink co mmand (encoding: 0dh) command parameters byte sequence parameter name default description 1 channel id na 0~7 the internally used channel for this uni link. each channel id is unique and should not be equal to any group id that has been assigned. it is recommended that channel id be used from 7 down to 0. as a group id is from 0 to 3, it is better for a channel id to be from 4 to 7 unless all the values from 4 to 7 are taken. 2link physical #na0~7 the physical link to be used in uni mode. note: if the value exceeds 7, the performance cannot be guaranteed. 3 tx utopia port 1fh 0~30 the utopia port address for data transmit. port 31 is reserved and should not be used. note: the upper 3 bits are don?t care. 4 rx utopia port 1fh 0~30 the utopia port address for data receive. port 31 is reserved and should not be used. note: the upper 3 bits are don?t care. 5 link line interface work mode 0fh mode0~mode15 line interface work mode for this link. note: if the value exceeds 15, imaos will work improperly. 6 link line interface clock 0h 0: common clock mode; 1: independent clock mode line interface clock input mode. the line interface mode7~mode10 and mode14~mode15 cannot be used in independent clock mode. note: imaos does not check this value. value exceeding 1 will cause wrong configuration. command reply byte sequence reply name description 1 ack 0: ok; 1: the link is busy or channel id is over 15; others: internal error. the chip should be reset. 123456 channel id link physical # tx utopia port rx utopia port link line interface work mode link line interface clock 1 ack
programming information for imaos08 48 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-29 startgroup command (encoding: 0eh) this command is used to start a configured group. command parameters byte sequence parameter name default description 1 group id na the valid physical group that has been configured. this is the same group id in configgrouppara command. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: the group is not configured; others: internal error. the chip should be reset. 1 group id 1 ack
programming information for imaos08 49 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-30 startlasr comm and (encoding: 0fh) this command is used to start lasr procedure on one or more links. the links here may be new links or links with failure/fault/ inhibiting condition. this command may combine with addtxlink and addrxlink commands. command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). valid physical group that has been configured and is in operational state. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: the group is not configured; 3: the previous lasr is not finished; others: internal error. the chip should be reset. 1 group id 1 ack
programming information for imaos08 50 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-31 inhibitgrp command (encoding: 10h) this command is used to inhibit a group. once a group is inhibited by this command, it will go to blocked state instead of the operational state when sufficient links exist in the group. if the group is already in o perational state, the gsm will transition to blocked state. command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). the physical group to be inhibited. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; others: internal error. the chip should be reset. 1 group id 1 ack
programming information for imaos08 51 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-32 notinhibitgrp command (encoding: 11h) this command is used to clear the inhibiting status. if a group is in blocked state, the gsm will go to operational state. command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). the physical group to be uninhibited. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; others: internal error. the chip should be reset. 1 group id 1 ack
programming information for imaos08 52 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-33 restartgrp co mmand (encoding: 12h) this command is used to restart the specified group. the gsm will go back to start-up state and all the tx and rx links will go back to unusable state. command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). the physical group to be restarted. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: the group is not configured; others: internal error. the chip should be reset. 1 group id 1 ack
programming information for imaos08 53 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-34 deletegrp command (encoding: 13h) this command is used to delete the specified group and all its links at once. upon the issue of this command, the gsm will go b ack to not configured state and all the links will transition to not in group state. command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). the physical group to be deleted. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter (length of the command is incorrect or group id is over 3); others: internal error. the chip should be reset. 1 group id 1 ack
programming information for imaos08 54 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-35 recoverlink command (encoding: 14h) this command is used to tell the IDT82V2608 that a link is no longer in fault state or cancel the inhibition made by ?deactlink ? command. this command should com- bine with a ?startlasr? command in order to recover the link physically. command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). the physical group that contains the link to be recovered by this command. 2 link physical id na 0~7 the physical link to be recovered. the link should belong to the group, and was previously deactivated. 3 direction na 0: rx; 1: tx; 2: both note1: if the group is in symmetry mode, both links should be recovered; note2: if the value exceeds 2, imaos will work improperly. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter; 2: the link does not belong to that group; others: internal error. the chip should be reset. 123 group id link physical id direction 1 ack
programming information for imaos08 55 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-36 deletelink command (encoding: 15h) this command is used to delete a link from a group. command parameters byte sequence parameter name default description 1 group id /channel id na the physical group id (0~3) or channel id (0~7). the physical group that contains the link to be deleted or channel id of the uni link to be deleted. 2 link physical id na 0~7 physical link to be deleted. the link should belong to the group. 3 direction na 0: rx; 1: tx; 2: both note1: if the group is in symmetry mode, both directions are deleted and the direction value is ignored. if it is a uni link, this parameter is ignored. note2: if the value exceeds 2, imaos will work improperly. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: the link does not belong to that group; others: internal error. the chip should be reset. after the link has both ends deleted, the link is in uni mode, which is the default work mode of a link. the ?getlink- state? command can be used to poll the link state. 123 group id /channel id link physical id direction 1 ack
programming information for imaos08 56 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-37 deactlink command (encoding: 16h) this command is to make a link go to unusable state due to user defined fault condition or that user just wants to inhibit it. command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3) the physical group that contains the link to be deactivated by this command. 2 link physical id na 0~7 physical link to be deactivated. the link should belong to the group. note: if the value exceeds 7, the performance cannot be guaranteed. 3 reason na 0: inhibition; 1: fault 4 direction na 0: rx; 1: tx; 2: both note1: if the group is in symmetry mode, both directions are deactivated and the direction value is ignored. note2: if the value exceeds 2, imaos will work improperly. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: the link does not belong to that group; others: internal error. the chip should be reset. 1234 group id link physical id reason direction 1 ack
programming information for imaos08 57 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-38 getgroupstate co mmand (encoding: 17h) command parameters byte sequence parameter name description 1 group id the physical group id (0~3). command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: information not available; others: internal error. the chip should be reset. note: if ack is not equal to 0, values for the following fields will not be returned. 2 negsmstate bits 3:0: ne group state 0000: start-up; 0001: start-up-ack; 0010: config-aborted - unsupported m; 0011: config-aborted - incompatible group symmetry; 0100: config-aborted - unsupported ima version; 0101, 0110: reserved for other config-aborted reasons in a future version of the ima specification; 0111: config-aborted - other reasons; 1000: insufficient-links; 1001: blocked; 1010: operational; others: reserved for later use in a future version of the ima specification. 3 fegsmstate bits 3:0: fe group state 0000: start-up; 0001: start-up-ack; 0010: config-aborted - unsupported m; 0011: config-aborted - incompatible group symmetry; 0100: config-aborted - unsupported ima version; 0101, 0110: reserved for other config-aborted reasons in a future version of the ima specification; 0111: config-aborted - other reasons; 1000: insufficient-links; 1001: blocked; 1010: operational; others: reserved for later use in a future version of the ima specification. 4 negtsmstate 0: gtsm is down; 1: gtsm is up. ne gtsm state. 1 group id 1234 ack negsmstate fegsmstate negtsmstate
programming information for imaos08 58 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-39 getgroupdelayinfo command (encoding: 18h) command parameters byte sequence parameter name description 1 group id the physical group id (0~3). command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: the info is not available; others: internal error. the chip should be reset. note: if ack is not equal to 0, the value for the following field will not be returned. 2-3 maxdiffdelayof- grouplinks (cells) the maximum delay value between any two links in that group. (msb byte first) 1 group id 12-3 ack maxdiffdelayofgrouplinks
programming information for imaos08 59 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-40 getlinkstate command (encoding: 19h) command parameters byte sequence parameter name description 1 physical link # 0~7 the # of the physical link. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; others: internal error. the chip should be reset. note1: for a uni link, only the tc state value is meaningful. other values are all meaningless. note2: if ack is not equal to 0, values for the following fields will not be returned. 2 nerxstate 0x00: not in any group; 0x01: unusable-no-reason; 0x02: unusable-fault; 0x03: unusable-misconnected; 0x04: unusable-inhibited; 0x05: unusable-failed; 0x06: usable; 0x07: active. the ne rx lsm state. 3 netxstate the same as above. the ne tx lsm state. 4 ferxstate the same as above. the fe rx lsm state. 5 fetxstate the same as above. the fe tx lsm state. 6tc statebit2: 0: not tc sync; 1: tc sync. other bits: don?t care 7 ima sync state bit5: 0: not ima sync state; 1: ima sync state. other bits: don?t care 1 physical link # 123456 7 ack nerxstate netxstate ferxstate fetxstate tc state ima sync state
programming information for imaos08 60 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-41 getgrpperf co mmand (encoding: 1ah) command parameters byte sequence parameter name description 1 group id the physical group id (0~3). command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: info not available; others: internal error. the chip should be reset. note: if ack is not equal to 0, the value for the following field will not be returned. 2-3 value value of gr-uas-ima (for detailed definition, refer to table-51 ) (msb byte first) if ack is equal to 0, the value of imagrpunavaisec will be re turned. if the performance parameter is not retrieved after a long period, it might reach the maximum value. in this case, the value is held. if ack is not 0, the value will be 0. 1 group id 12-3 ack value
programming information for imaos08 61 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-42 getlinkperf co mmand (encoding: 1bh) command parameters byte sequence parameter name description 1 physical link # 0~7 the # of the physical link. 2 type the performance types (for detailed description of these performance types, please refer to table-51 ): command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: info not available; others: internal error. the chip should be reset. note: if ack is not equal to 0, the value for the following field will not be returned. 12 physical link # type performance type parameters 0 ses-ima ses-ima-fe uas-ima uas-ima-fe 1tx-uus-ima rx-uus-ima tx-uus-ima-fe rx-uus-ima-fe 2ocd_tc hcs_err_tc iv-ima 3 rx-stuff-ima tx-stuff-ima oif-ima 12-10 ack value
programming information for imaos08 62 december 4, 2006 IDT82V2608 inverse multiplexing for atm 2-10 value the counter value of the performance parameter according to type (msb first). the returned value occupies 9 bytes. different parameters take different number of bytes. note: if the performance parameters are not retrieved after a long period, they might reach the maximum value. in this case, the values are held. table-42 getlinkperf command (e ncoding: 1bh) (continued) performance type parameters bytes 0 ses-ima 2 ses-ima-fe 2 uas-ima 2 uas-ima-fe 2 01 1tx-uus-ima2 rx-uus-ima 2 tx-uus-ima-fe 2 rx-uus-ima-fe 2 01 2ocd_tc3 hcs_err_tc 3 iv-ima 3 3 rx-stuff-ima 3 tx-stuff-ima 3 oif-ima 3
programming information for imaos08 63 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-43 getconfigpara co mmand (encoding: 1ch) this command is used to get the parameters as shown in the parameter list of a command (designated by command id), i.e., get th e configured information or default information as a command?s parameter list designated. command parameters byte sequence parameter name description 1 command id the command encoding of the commands below: ? configdev ? configutopiaif ? configloopmode ? configgrouppara ? configgroupinterface ? configgroupworkmode ? configgsmtimers ? configtrl ? configifsmpara note: if the value is not one from above, imaos will work improperly. 2 group id the group id (if command id is ?configdev?, do not care this parameter, that is, any value will do.) if the command (such as configdev command) has no group id parameter, this field should be set to 0 and will be ignored by the embedded controller. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: info not available; others: internal error. the chip should be reset. note1: if ack is not equal to 0, values for the following fields will not be returned. note2: if ack for this command is equal to 0 but the ack for the command sent before is not equal to 0, values for the following fields are undetermined. 2 command id sent before the command id sent before. 3 group id sent before the group id sent before. for configdev command, this byte has no meaning. 4-12 parameter sent before this field contains all the parameters that were sent previously excluding the group id, as it is returned in byte 3. the length of this field depends on the command id and the sequence is the same as the input. 12 command id group id 12 3 4-12 ack command id sent before group id sent before parameter sent before
programming information for imaos08 64 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-44 getgrpworkingpara command (encoding: 1dh) command parameters byte sequence parameter name description 1 group id the physical group id (0~3). command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: info not available; others: internal error. the chip should be reset. note: if ack is not equal to 0, values for the following fields will not be returned. 2 ne ima id the ima id in the icp cell transmitted to the fe from the ne. 3 fe ima id the ima id in the icp cell that the ne received from the fe. 4m tx the ima frame length the ne is using. 5m rx the ima frame length the fe is using. 6 version now used 0: both ends are 1.1; 1: the fe is 1.0 and the ne is 1.0 compatible. 7 tx trl the physical link # used for tx trl. 8 rx trl the physical link # the fe used for trl. 1 group id 12345 6 78 ack ne ima id fe ima id m tx m rx version now used tx trl rx trl
programming information for imaos08 65 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-45 getlinkworkingpara command (encoding: 1eh) command parameters byte sequence parameter name description 1 physical link # 0~7. the # of the physical link. command reply byte sequence reply name description 1 ack 0: acknowledge; 1: invalid parameter; 2: info not available; others: internal error. the chip should be reset. note: if ack is not equal to 0, values for the following fields will not be returned. 2 mode 0: uni; 1: ima mode ? only rx used; 2: ima mode ? only tx used; 3: ima mode ? both tx and rx are used. 3 group id /uni mode utopia tx port if mode is ima, this value means which physical group at the ne the link belongs to; if mode is uni, this value is the utopia tx port address. 4 txlink id / uni mode utopia rx port if mode is ima, this value means the logical link # assigned (0~31), if mode is uni, this value is the utopia rx port address. 5 rxlink id the logical link id the fe is using. 6 tx icp offset 0~255 (in ima mode; not used in uni mode). 1 physical link # 12 3 4 56 ack mode group id /uni mode utopia tx port txlink id / uni mode utopia rx port rxlink id tx icp offset
programming information for imaos08 66 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-46 starttestpattern command (encoding: 1fh) command parameters byte sequence parameter name description 1 group id the physical group id (0~3) 2 physical link # 0~7 the # of the physical link. 3 pattern 0~ffh, and ffh is not recommended. this byte is used to define the pattern for testing purpose. command reply byte sequence reply name description ack 0: acknowledge; 1: invalid parameter; 2: the link does not belong to the group; others: internal error. the chip should be reset. 123 group id physical link # pattern 1 ack
programming information for imaos08 67 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-47 getloopedtestpatter n command (encoding: 20h) command parameters byte sequence parameter name description 1 group id the physical group id (0~3) 2 physical link # 0~7 the # of the physical link. command reply byte sequence reply name description ack 1 0: acknowledge; 1: invalid parameter; 2: the link does not belong to the group; others: internal error. the chip should be reset. note: if ack is not equal to 0, the value for the following field will not be returned. pattern 1 the fe looped test pattern over that link 12 group id physical link # 12 ack pattern
programming information for imaos08 68 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-48 stoptestpattern command (encoding: 21h) command parameters byte sequence parameter name description 1 group id the physical group id (0~3) command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter; others: internal error. the chip should be reset. table-49 getversioninfo command (encoding: 22h) command parameters no. command reply byte sequence reply name description 1ack0: ok; others: internal error. the chip should be reset. note: if ack is not equal to 0, values for the following fields will not be returned. 2 sw_ver_majority the integer part of the imaos version. for example, if the current version is 1.12, the returned value will be 1. 3 sw_ver_minority the fractional part of the imaos version. for example, if the current version is 1.12, the returned value will be 12. 1 group id 1 ack 123 ack sw_ver_majority sw_ver_minority
ima operation 69 december 4, 2006 IDT82V2608 inverse multiplexing for atm 6ima operation this chapter is a brief introduc tion of how a group and links are configured, started, inhibited, deleted and so on. 6.1 ima initialization configdev command is the first command to be issued to initialize the device. if this command is not is sued, the default value will be used. 6.2 configure a group after a group is configured, an id (ima id) is allocated to a physical group, links are assigned to that group and other parameters needed for the group?s proper operation are set. the ima id should not be changed during the whole life cycle of the group except that the group is restarted. table-50 is the list of group parameters that should be config- ured. table-50 parameters for ima group configuration parameter name description group id the physical group id used for this ima group. ne ima id the ima group logical id#. m for tx (m tx ) the frame length that the ne tx would like to use. acceptable m for rx (m rx ) the frame length proposed by the fe tx that the ne rx can accept. max delay compensation value (cells) the maximum different link delay value a group is expected to have. version backward compatibility whether ima 1.0 is supported txutopia port the utopia address where atm traffic comes from rxutopia port the utopia address where atm traffic goes symmetry mode the group link?s configuration and operation mode. timing clock mode the transmission timing clock mode. stuff mode the sicp insertion method. stuff adv mode the stuff pre-notify mode. valid value is 1 or 4. timer for gsm start up ack this is the timer for gsm to return from start-up ack to start-up state when there is no response fro m the fe. timer for gsm configure abort this is the timer for gsm to return from start-up abort state to start-up state. timer for gsm to report rx=active this is the timer for group wide start-up procedure to report rx=active state. timer for gsm to report tx=active this is the timer for group wide start-up procedure to report tx=active state. tx trl the transmit timing reference link. (physical id) alpha the number of consecutive invalid icp cells for the ifsm state machine to exit sync state. default value is 2. beta the number of consecutive errored icp cells for the ifsm state machine to exit sync state. default value is 2. gamma the number of consecutive valid icp cells for the ifsm state machine to enter sync state. default value is 1. p tx the minimum number of active tx links for the group to enter operational state p rx the minimum number of active rx links for the group to enter operational state all the tx links? physical ids the physical links? id used for transmission. all the tx links? logical ids the logical link id for each tx link. all the rx links? physical ids the physical links? id used for receiving. all tx links? line interface work mode the line interface work mode for each tx link. all rx links? line interface work mode the line interface work mode for each rx link. all tx links? line interface clock mode the line interface clock mode for each tx link. all rx links? line interface work mode the line interface clock mode for each rx link.
ima operation 70 december 4, 2006 IDT82V2608 inverse multiplexing for atm 6.3 start up a group a group can be started by startgroup command. at ima group start- up, the ne and the fe exchange thei r configuration parameters. when both ends accept the parameters proposed by the other end, they enter an intermediate state to wait for p tx and p rx links to enter active state. the group can then enter operational state. 6.4 inhibit a group/not inhibit a group the inhibition of a group is the shut down of the group for a reason other than insufficient links. a group can be inhibited by inhibitgrp command. a group inhibition state can be cancelled by notinhibitgrp command. 6.5 add links to a grou p that is in opera- tional state the lasr (link addition and slow recovery) procedure is to be started when new links are to be inserted or links are to be recovered from a group. the lasr procedure can be started by startlasr command. 6.6 delete links a link can be removed by deletelink command. the deletion proce- dure can be initiated from both the tx and rx side. 6.7 deactivate and recover links links are deactivated because of link fault, failure (rx failed) or inhi- bition while links are recovered becaus e defect no longer exists or inhibi- tion is cancelled. the deactivation-recovering of a link is done by the IDT82V2608 automatically according to the fe not ification (remote failure indicator in icp cell) or by the embedded controller (issue commands like deactlink and recoverlink commands) due to link fault or inhibition or no longer link fault or inhibition. 6.8 restart a group after a group is started, the parameters of the group can be reconfig- ured at any time, which will caus e the group to be restarted automati- cally. however, a group can also be restarted by restartgrp command. when a group is restarted, the gsm transits to start-up state from any other states except not configured state. if the gsm is in operational state, the group may be blocked and all the links be inhibited before restart. 6.9 delete a group when a group is deleted from any other state by deletegrp command, the gsm enters not conf igured state and all the links belonging to that group will also be deleted and unassigned. tx links? icp offsets the icp cell location with in the ima frame transmitted over each tx link. all tx links? backup property the tx link added to the group is a backup link or not. all rx links? backup property the rx link added to the group is a backup link or not. table-50 parameters for ima gr oup configuration (continued)
pmon (performance monitoring) 71 december 4, 2006 IDT82V2608 inverse multiplexing for atm 7 pmon (performance monitoring) the pmon module uses counter s for performance monitoring and failure/alarms integration. table-51 shows the performance parameters that the IDT82V2608 implements. table-53 lists the failure/alarm signals sent by alarm messages. table-51 the pmon parameters parameter link/group definition retrieve ses-ima link count of ne se verely errored seconds. getlinkperf command ses-ima-fe link count of fe severely errored seconds. uas-ima link count of ne unavailable seconds. uas-ima-fe link count of fe unavailable seconds. tx-uus-ima link count of ne tx unusable seconds. rx-uus-ima link count of ne rx unusable seconds. tx-uus-ima-fe link count of fe tx unusable seconds. rx-uus-ima-fe link count of fe rx unusable seconds. ocd_tc link count of link out of cell delineation entrances. hcs_err_tc link count of cell header sequence error. iv-ima link count of icp violations. three types of icp invalid signals will cause the iv-ima. they are: errored icp, invalid icp and missing icp. (see table-52 for definitions). the iv-ima is counted only during non-ses-ima or non-uas-ima period. rx-stuff-ima link count of received stuff icp cells over one link. tx-stuff-ima link count of transmitted stuff icp cells over one link. oif-ima link count of out of ima frame anomalie s except during ses-ima or uas-ima conditions. gr-uas-ima group count of seconds when gtsm is down. getgrpperf command table-52 definitions of different icp cells icp cell type definition errored icp cell with a hec or crc-10 error at expected icp frame position and is not a missing icp cell. invalid icp cell with good hec and crc-10 and cid=icp at expected frame position but with one of the following unexpected errors: ? unexpected ima label ? unexpected lid ? unexpected ima id ? received m expected m ? unexpected ima frame sequence number ? unexpected icp cell offset missing icp cell located at icp cell location with: ? no hec error but without ima oam cell header or ? no hec error and with ima oam cell header but the cid icp.
pmon (performance monitoring) 72 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-53 failure/alarm signals sequence name link /group implement definition 01h lcd link sw loss of cell delineation. 02h lif link sw loss of ima frame. 03h lods link sw link out of delay synchronization. 04h rfi-ima link sw persistence of an rdi-ima defect at the ne. 05h tx-unusable-fe link sw when the fe reports tx-unusable. 06h rx-unusable-fe link sw when the fe reports rx-unusable. 07h start-up-fe group sw when the fe is starting-up (the declaration of this failure alarm may be delayed to ensure the fe remains in start-up). 08h config-aborted group sw when the fe tries to use unacceptable configuration parameters. 09h config-aborted-fe group sw when the fe reports unacceptable configuration parameters. 0ah insufficient-links group sw when less than p tx transmit or p rx receive links are active. 0bh insufficient-links-fe group sw when the fe reports that less than p tx transmit or p rx receive links are active. 0ch blocked-fe group sw when the fe reports that it is blocked. 0dh gr-timing-mismatch group sw when the fe transmit cloc k mode is different from the ne transmit clock mode.
imaos08_slave 73 december 4, 2006 IDT82V2608 inverse multiplexing for atm 8 imaos08_slave the previous chapters 4, 5, 6 and 7 are specific to imaos08. details about imaos08_slave are provided in this chapter. when imaos08_slave is downloaded, the device supports the group auto detect function and operates in slave mode. 8.1 group auto detect the group auto detect function can be used to configure and start a group from one end while forcing the other end?s group to follow this end?s group configuration and start-up procedure, that is, the other end?s group can be brought into operational state automatically. the two ends are called master side and slave side separately. 8.1.1 master side the master side should download imaos08 and work in symmetry mode. up to 4 groups can be started at the master side. the configuration of the master si de is the same as that in normal work mode. 8.1.2 slave side the slave side should download imaos08_slave. after power-on or reset, the sl ave side should be initialized by issuing the deviceinitial, config slaveframe, configutopiaif and grou- pinitial commands. only after the sl ave side has been initialized will the slave side start to detect t he far end?s start-up procedure. after the far end has started up, the slave side will be brought into operational state automatically wit hout any need of local group configu- ration and management. 8.2 programming information for imaos08_slave 8.2.1 command types refer to 5.1 command types . 8.2.2 command encoding 8.2.3 command description each command description contains two parts: the command parameters and the command reply. in the command parameters part, a figure is used to illustrate the byte sequence of the parameters. all the parameters description are listed below the figure. in the command reply part, a figure is used to illustrate the reply sequence in the reply message. the reply descripti on is listed below the figure. for detailed information about the packet of command message and reply message, refer to page 31 . table-54 command encoding command encoding command name 01h deviceinitial 02h configslaveframe 03h configutopiaif 22h getversioninfo 23h groupinitial
imaos08_slave 74 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-55 deviceinitial co mmand (encoding: 01h) this is the first command to be issued. if this command is not issued, the default value will be used. command parameters byte sequence parameter name default description 1-2 sysclk 4e20h sysclk=frequency of system clock (hz)/1000. fo r example, if the system clock is 20 mhz, this value would be 20000. unit: sys-ticks in 1 ms (msb first) note: wrong configuration will make imaos_slave?s timer work improperly. 3t in 2h timer of entering failure alarm state. when a defect persists for a period set by this timer, the IDT82V2608 will enter failure alarm state. unit: 250 ms 4t exit 0ah timer of exiting failure alarm state. if a defect no longer exists for a period set by this timer, the IDT82V2608 will exit failure alarm state. unit: 250 ms 5 no 0h reserved. write 0 to this field. 6 tcworkmode 7h 7 tcalpha&delta 67h alpha value is the number of consecutive incorrect hec fields for the rx cell synchronization state machine to exit sync state. delta value is the number of consecutive correct hec fields for the rx cell synchronization state machine to enter sync state. 8 tclcd_threshold 68h 0~255 lcd threshold. if the ocd anomaly persists for the time set by this parameter, lcd defect will be reported. unit: one cell?s transmission time 1-2345678 sysclk t in t exit no tcworkmode tcalpha&delta tclcd_threshold bit position description 7~3 don?t care 2 1: enable tx tc scrambling (default); 0: disable tx tc scrambling 1 1: enable rx tc hec erro r correct control (default); 0: disable rx tc hec error correct control 0 1: enable rx tc de-scrambling (default); 0: disable rx tc de-scrambling bit position description 7-4 delta value. valid is 0~15. 3-0 alpha value. valid is 0~15.
imaos08_slave 75 december 4, 2006 IDT82V2608 inverse multiplexing for atm command reply byte sequence reply name description 1 ack 0: ok; 1: invalid parameter (length of the command is incorrect); others: internal error. the chip should be reset. table-55 deviceinitial command (encoding: 01h) (continued) 1 ack
imaos08_slave 76 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-56 configslaveframe command (encoding: 02h) command parameters byte sequence parameter name default description 1 line interface work mode 0fh mode0~mode15 line interface work mode for all the links. 2 line interface clock mode 0h 0: common clock mode; 1: independent clock mode line interface clock input mode for all the links. line interface mode7~mode10 and mode14~mode15 cannot be used in independent clock mode. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter (length of the command is incorrect). others: internal error. the chip should be reset. 12 line interface work mode line interface clock mode 1 ack
imaos08_slave 77 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-57 configutopiaif command (encoding: 03h) command parameters byte sequence parameter name default description 1-4 tx utopia port enable 00000000h every bit of the 4 bytes enables a utopia tx port (msb byte first, lsb byte last). 0: disable the port; 1: enable the port this 4 bytes parameter enables or disables each of the 31 utopia port (port 31 is reserved and should not be used). the 4 bytes can be regarded as a sequence of 32 bits. the most significant bit in byte 1 (the first byte sent to embedded controller) is bit 31. the least significant bit of byte 4 (the last byte sent) is bit 0. 5-8 rx utopia port enable 00000000h every bit of the 4 bytes enables a utopia rx port (msb byte first, lsb byte last). 0: disable the port; 1: enable the port the meaning of this parameter is similar to the utopia tx port enable field. see above. command reply byte sequence reply name description 1 ack 0: ok; 1: invalid parameter (length of the command is incorrect); others: internal error. the chip should be reset. 1-4 5-8 tx utopia port enable rx utopia port enable 1 ack
imaos08_slave 78 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-58 getversioninfo command (encoding: 22h) command parameters no. command reply byte sequence reply name description 1ack0: ok; others: internal error. the chip should be reset. note: if ack is not equal to 0, values for the following fields will not be returned. 2 sw_ver_majority (1) the integer part of the version. for example, if the current version is 2.12, the returned value will be 2. 3 sw_ver_minority the fractional part of the version. for example, if the current version is 2.12, the returned value will be 12. 1. for imaos08, the returned value is an odd number. for imaos08_slave, the returned value is an even number. 123 ack sw_ver_majority sw_ver_minority
imaos08_slave 79 december 4, 2006 IDT82V2608 inverse multiplexing for atm table-59 groupinitial command (encoding: 23h) command parameters byte sequence parameter name default description 1 group id na the physical group id (0~3). the group id follows the ima id of the master side. note that the ima id of the master side should not exceed 3. 2 tx utopia port 1fh 0~30 the utopia port address for data transmit. port 31 is reserved and should not be used. note: the upper 3 bits are don?t care. 3 rx utopia port 1fh 0~30 the utopia port address for data receive. port 31 is reserved and should not be used. note: the upper 3 bits are don?t care. 4-5 max delay compen- sation value na 0~1024 cells this is the maximum cells delay that can be tolerated. this value is constrained by the size of the external sram and it shall be no more than 1024 cells. refer to 3.4 sram interface . note: if the value exceeds 1024, imaos_slave will work improperly. command reply byte sequence reply name description 1ack0: ok; 1: invalid parameter; others: internal error. the chip should be reset. 123 4-5 group id tx utopia port rx utopia port max delay compensation value 1 ack
jtag test access port 80 december 4, 2006 IDT82V2608 inverse multiplexing for atm 9 jtag test access port 9.1 tap bus signals the interface from the board to the on-chip test access port is the tap bus, which consists of five signals: ! the standard bus: tdi, tdo, tck, tms . ! trst : test reset. reset the tap controller. the signal is specified as optional in the ieee spec. trst is an active low signal that resets all flip-flops of tap asynchronously. 9.2 instructions meet the ieee standard [13] which requires at least extest, bypass, idcode and sample instructions are implemented. the IDT82V2608 identification code is 104b8067 hexadecimal.
physical and electrical characteristics 81 december 4, 2006 IDT82V2608 inverse multiplexing for atm 10 physical and electrical characteristics 10.1 absolute maximum ratings 10.2 d.c. characteristics @ ta= -40 to +85c. table-60 absolute maximum ratings parameter min max storage temperature -65 c +150 c voltage on vdd with reference to gnd -0.3 v 4.6 v voltage on input pin -0.3 v 5.25 v voltage on output pin -0.3 v vdd+0.3 v maximum lead temperature for soldering during 10 s 230 c esd performance (hbm) 2000 v latch-up current on any pin 100 ma maximum junction temperature 150 c table-61 d.c. characteristics parameter description min typ max unit test conditions vdd core power supply 2.97 3.3 3.63 v v ol output low voltage 0.40 v vdd=min, i ol =4 ma or 6 ma (1) 1. the output driving capacity of all the embedded memory output pi ns are 4ma while the output driving capacity of all the other o utput pins are 6ma. v oh output high voltage 2.4 v vdd=min, i oh = 4 ma or 6 ma v t+ input high voltage (2) 2. all the input pins are schmitt-trigger pins. 2.0 v v t- input low voltage 0.83 v v th input hysteresis voltage 0.17 0.65 1.17 v i ilpu input low current -20 -55 -200 ua v il =gnd i il input low current -1 0 +1 ua v il =gnd i ih input high current -2 0 +2 ua v ih =+5 v i ddop1 operating current 160 ma vdd=3.63 v, sysclk=25 mhz
physical and electrical characteristics 82 december 4, 2006 IDT82V2608 inverse multiplexing for atm 10.3 a.c. characteristics @ ta=-40 to +85 c, vdd=3.3 v10% 10.3.1 output loading default load capacitance on output is 50 pf. microprocessor interface and utopia interface outputs are loaded by 100 pf. 10.3.2 system clock and rst signal timing figure-13 reset signal timing diagram table-62 system clock and reset timing parameters parameter description min max unit tsysclk the system clock cycle time 40 54 ns d sysclk the system clock duty cycle 40 60 % t rst the rst pulse width 1 ms trst rst
physical and electrical characteristics 83 december 4, 2006 IDT82V2608 inverse multiplexing for atm 10.3.3 utopia interface timing figure-14 tx utopia interface timing diagram figure-15 rx utopia interface timing diagram table-63 utopia interface timing parameters parameter description min max unit f txclk utopia tx interface clock frequency f sysclk (1) 1. f sysclk is the frequency of the system clock the chip uses. mhz f rxclk utopia rx interface clock frequency f sysclk mhz tclav txclav and rxclav valid from rising edge of txclk and rxclk respectively 20 tuts txenb , txsoc, txdata and txaddr to txclk setup time 6 ns tuth txenb , txsoc, txdata and txaddr to txclk hold time 1 ns turco rxclav, rxsoc, rxdata valid from rising edge of rxclk 20 ns turs rxaddr, rxenb to rxclk setup time 6 ns turh rxaddr, rxenb to rxclk hold time 1 ns tp width of pull-down pulse after txclav or rxclav is deasserted. 2 ns txclk txclav txenb, txsoc, txdata, txaddr tclav tuth tuts tp tclav rxclk rxsoc, rxdata rxenb, rxaddr turco turh turs tclav tp tclav rxclav
physical and electrical characteristics 84 december 4, 2006 IDT82V2608 inverse multiplexing for atm 10.3.4 line interface timing figure-16 line interface transmit timing diagram figure-17 line interface receive timing diagram table-64 line interface timing parameters parameter description min max unit d ck the tsck, tscck, rsck and rscck clock duty cycle 40 60 % f tscke1 e1 mode transmit direction clock frequency 8.192 mhz f rscke1 e1 mode receive direction clock frequency 8.192 mhz f tsckt1 t1 mode transmit direction clock frequency 8.192 mhz f rsckt1 t1 mode receive direction clock frequency 8.192 mhz tfdco tsd valid from tsck 20 ns tfs tsf, tscfs to tsck set up time; rsd, rsf, rscfs to rsck set up time 10 ns tfh tsf, tscfs to tsck hold time; rsd, rsf, rscfs to rsck hold time 5ns tsd bit5 bit6 bit7 tfdco tfs tfh tsf, tscfs tsck, tscck rsd bit5 bit6 bit7 rsck, rscck tfs tfh rsf, rscfs
physical and electrical characteristics 85 december 4, 2006 IDT82V2608 inverse multiplexing for atm 10.3.5 microprocessor interface timing 10.3.5.1interface with motorola cpu (mpm =0) read cycle specification figure-18 microprocessor interface timi ng diagram for motorola cpu read cycle table-65 microprocessor interf ace timing parameter for motorola cpu read cycle symbol parameter min max unit trc read cycle time 240 ns tdw valid read signal width 235 ns trwv r w available time after valid read signal falling edge 10 ns trwh r w hold time after valid read signal falling edge 135 ns tav address available time after valid read signal falling edge 10 ns tadh address hold time after valid read signal falling edge 135 ns tprd data propagation delay after valid read signal falling edge 205 ns tdh read out data hold time after valid read signal rising edge 5 20 ns trecovery recovery time from read cycle 5 ns a[x:0] valid address ds+cs rw read d[7:0] trwv tdh tadh trwh tprd trc tdw tav trecovery valid data
physical and electrical characteristics 86 december 4, 2006 IDT82V2608 inverse multiplexing for atm write cycle specification figure-19 microprocessor interface timing diagram for motorola cpu write cycle table-66 microprocessor interf ace timing parameters for motorola cpu write cycle symbol parameter min max unit twc write cycle time 240 ns tdw valid write signal width 235 ns trwv r w available time after valid write signal falling edge 10 ns trwh r w hold time after valid write signal falling edge 165 ns tav address available time after valid write signal falling edge 10 ns tah address hold time after valid write signal falling edge 165 ns tdv data propagation delay after valid write signal falling edge 50 ns tdhw data hold time after valid write signal rising edge 165 ns trecovery recovery time from write cycle 5 ns a[x:0] valid address ds+cs rw write d[7:0] trwv tdhw tah trwh twc tdw tav valid data tdv trecovery
physical and electrical characteristics 87 december 4, 2006 IDT82V2608 inverse multiplexing for atm 10.3.5.2interface with intel cpu (mpm =1) read cycle specification figure-20 microprocessor interface timing diagram for intel cpu read cycle table-67 microprocessor inte rface timing parameter fo r intel cpu read cycle symbol parameter min max unit trc read cycle time 240 ns trdw valid read signal width 235 ns tav address available time after valid read signal falling edge 10 ns tah address hold time after valid read signal falling edge 135 ns tprd data propagation delay after valid read signal falling edge 205 ns tdh read out data hold time after valid read signal rising edge 5 20 ns trecovery recovery time from read cycle 5 ns a[x:0] valid address cs+rd read d[7:0] valid data tdh tah tprd trdw tav note: wr should be tied to high trecovery trc
physical and electrical characteristics 88 december 4, 2006 IDT82V2608 inverse multiplexing for atm write cycle specification figure-21 microprocessor interface timing diagram for intel cpu write cycle table-68 microprocessor interf ace timing parameters for intel cpu write cycle symbol parameter min max unit twc write cycle time 240 ns twrw valid write signal width 235 ns tav address available time after valid write signal falling edge 10 ns tah address hold time after valid write signal falling edge 165 ns tdv data available time after valid write signal falling edge 50 ns tdhw data hold time after valid write signal falling edge 165 ns trecovery recovery time from write cycle 5 ns a[x:0] valid address wr+cs write d[7:0] tdhw tah twc twrw tav valid data tdv note: rd should be tied to high trecovery
physical and electrical characteristics 89 december 4, 2006 IDT82V2608 inverse multiplexing for atm 10.3.6 sram interface timing 10.3.6.1write cycle specification figure-22 sram interface timing diagram for write cycle table-69 sram interface write cycle parameters symbol description min max unit twc write cycle time 40 ns tas address set up time 3 20 ns tah address hold time 1 ns twp write pulse width 20 ns tdw data valid to end of write 7 ns tdh data hold time 0 ns twc tas tah tdw tdh ema em_cs em_we emd twp em_oe valid data
physical and electrical characteristics 90 december 4, 2006 IDT82V2608 inverse multiplexing for atm 10.3.6.2read cycle specification figure-23 sram interface timing diagram for read cycle table-70 sram interface read cycle parameters symbol description min max unit trc read cycle time 40 ns taa address access time 20 ns tca em_cs access time 20 ns toa em_oe access time 20 tchz delay from disabled em_cs to data bus high impedance 7 ns tohz delay from disabled em_oe to data bus high impedance 7 ns ema em_cs em_oe emd em_we trc taa toa tchz tohz valid data tca
glossary 91 december 4, 2006 active state ? a link state indicating that the link is ready for transmitting or receiving atm cells in the specified direction, either tx o r rx. each direction may enter active state asynchronously. anomaly ? discrepancy between the actual and desired characteristic of an item. an anomaly may or may not affect an item to perform a required function. api ? application programming interface asymmetrical config- uration ? this is an ima configuration scheme. in this configuration mode, the physical links that are assigned to an ima group are not required to be configured in both tx and rx directions. that is, some of the physical links may be configured to use both direc tions while others may only use one direction (tx or rx). asymmetrical opera- tion ? this is an atm traffic transfer mode of an ima group. in this mode, the physical link can be used to transfer data in one dire ction and does not care the other direction?s tx and rx state. that is, when the tx state of end a and rx state of end b have both entere d active state, end a starts to transfer data to end b and end b starts to receive. in this case, end a does not care whether end a?s rx state is active or not and end b does not care whether end b?s tx state is active or not. atm ? asynchronous transfer mode atm layer cells ? cells (atm formatted) that are exchanged between atm layer and ima sublayer. it is also called application data. blocked state ? this is a group state indicating that the group has been inhibite d from transiting into operational state for some administrat ive purposes. config-aborted ? this is a group state indicating that the group has rejected the group parameters proposed by the fe ima group. common transmit clock (ctc) ? this is a configuration where the transmit clocks of all the physical links within an ima group are derived from the same cloc k source. data round-robin ? this is the data transfer method ima used to deliver cells from atm layer to multiple transmit links within an ima group, or t he data play-out method that the ima used to form a consecutive ce ll stream from multiple receive links within an ima group. defect ? a defect may be caused by successive anomaly of an item to perform a required function. the defect may or may not lead to main - tenance action depending on the results of additional analysis. es ? errored seconds far end (fe) ? two communication entities are considered to be two communication ends. mostly, one is called near-end (ne) and the other is called far-end (fe). filler cell ? this is a kind of oam cell used by ima layer. it is used to fill in the ima frame when no cells are available at the atm layer . thus filler cell is used for cell rate decoupling at ima sublayer (like idle cell used in tc layer). group state machine (gsm) ? this is the state machine that determines the behavior of the ima group. group traffic state machine (gtsm) ? this state machine controls when to exchange atm layer cell between the atm layer and the ima layer group wide proce- dure (gwp) ? this refers to the group start-up and lasr procedures performed by the ima unit to synchronize the activation of ima links wit hin the ima group. header error check (hec) ? this is used for checking the correctness of the atm cell header. glossary
IDT82V2608 inverse multiplexing for atm glossary 92 december 4, 2006 icp offset ? the icp cell is used for ima frame synchronization. the icp offset is used to tell the receive side the icp cell?s position in an ima frame and the receive side can make use of this information to figure out the first cell of the frame. icp cell ? the icp cell is a kind of oam cell. it can be used by the ima sublayer to delineate the ima frame. also, it conveys informatio n about the status or configuration parameters of each end. icp stuff ? the icp stuff is two consecutive icp cells at the icp offset position. the icp stuff is inserted by repeating the icp cell. th e purpose of the icp stuff is to decrease the ima data cell rate of fast links at the transmit side. when an icp stuff is inserted into a n ima frame, the frame length will become m+1, with m being the frame length without icp stuff. ima frame synchro- nization mechanism (ifsm) ? this is a state machine used for receiving ima frame synchronization. it is an analogy to the cell delineation mechanism defin ed in itu-t recommendation i.432. ima ? inverse multiplexing for atm ima frame ? the ima frame is a cell stream transmitted over ima links within an ima group. there are altogether m cells in one ima frame w ithout icp stuff. m could be 32, 64, 128 or 256. in each ima frame, there are one icp cell, atm layer cells and ima filler cells. the icp cells occur at the offset position specified in the icp cell (the offset may be different for different links). ima group ? the ima group is a number of links at one end that are used to establish an ima virtual link to the other end. ima link ? an ima link is a unidirectional logical link of a physical link?s tx or rx direction. the ima link is identified by the value of lid field of the icp cells carried over that ima link. thus a physical link that connects two ends (a and b) may consist of two ima links, o ne from a to b and the other from b to a. ima sublayer ? the ima is a sublayer part of the physical layer and located between the interface specific transmission convergence (tc) subl ayer and the atm layer. ima virtual link ? this is a data communication channel between two communication ends (two ima units) over a number of physical links; these lin ks are also called an ima group. imaos08 ? a downloaded software used when the device is in normal communication. imaos08_slave ? a downloaded software used when the device operates in slave mode. it supports the group auto detect function. independent trans- mit clock (itc) ? this is a configuration where there is at least one ima link within an ima group that has its transmit clock derived from a cl ock source that is different from that of other ima links. the ima transmitter may indicate that it is in the itc mode even if all of the transmit clocks of the links are derived from the same source. in group ? this is an event indicating that a link has been configured into an ima group. inhibiting ? this represents the action to voluntarily disable the capacity of the group or the link to carry atm layer cells for reasons o ther than reported problems. insufficient-links ? group state indicating that the group does not have sufficient links in the active state to be in the operational state. lasr ? this stands for link addition and slow recovery procedure. lcd ? loss of cell delineation defect. the lcd defect is reported when the ocd anomaly persists for the time specified in itu-t reco m- mendation i.432 [30]. the lcd defect is cleared when the ocd anomaly has not been detected for the period of time specified in itu-t recommendation i.432. lid ? link identifier. the lid field in the icp cell is used to identify an ima link on which the icp cells are transmitted. the lid is been used to determine the round-robin order to retrieve cells from the incoming ima links at the ima receiver. lif ? loss of ima frame defect. the lif defect is the occurrenc e of persistent oif anomalies for at least 2 ima frames. link ? the term ?link? refers to an ima link in this data sheet, unless the context clearly refers to a physical link. link defect ? a link defect is the occurrence of the persistent detection of an anomaly at the interface specific transmission convergence s ub- layer. los, lof/oof, ais, loc and lcd defects are examples of link defects reported at the interface specific transmission con- vergence sublayer.
IDT82V2608 inverse multiplexing for atm glossary 93 december 4, 2006 lods ? link out of delay synchronization defect. the lods is a link event indicating that the link is not synchronized with the other links within the ima group. lof ?loss of frame los ? loss of signal lsb ? least significant bit lsi ? link stuff indication lsm ? link state machine m ? ima frame size mib ? management information base mpu ? microprocessor unit msb ? most significant bit ne ? near-end (local end) not configured ? this is a group state indicating that the group does not exist yet. not in group ? this is used as an event or a state indicating that a link is no longer configured within an ima group. oam ? operations and maintenance ocd ? out of cell delineation anomaly. as specified in itu-t recommendation i.432 [30], an ocd anomaly is reported upon the occur- rence of alpha ( ) consecutive cells with incorrect hec, and it is no longer reported after detecting delta ( ) consecutive cells with correct hec. oif ? out of ima frame anomaly oof ? out of frame operational ? group state indicating that the group has sufficient links in both tx and rx directions to carry atm layer cells. physical link ? this is the link being used by the ima unit to transmit and receive atm cells. the ima unit may use physical links in one or b oth directions. p rx ? minimum number of links required to be active in the receive direction for the ima group to move into the operational state. p tx ? minimum number of links required to be active in the transmit direction for the ima group to move into the operational state. rdi ? remote defect indicator rfi ? remote failure indicator rx ? receive (side) ses ? severely errored seconds sicp cell ? stuff icp cell. one of the 2 icp cells comprising a stuff event. stuff event ? this is a repetition of an icp cell over one ima link to compensate for timing difference with other links within the ima grou p. start-up ? this is a group state indicating that the group is waiting to see the fe in start-up. start-up-ack ? this is a group transitional state, when both groups are in start-up and the fe group parameters have been accepted. symmetrical configu- ration ? this is an ima group configuration scheme. in this configuration mode, physical links that are assigned to an ima group are re quired to be configured in both tx and rx directions. symmetrical opera- tion ? this is an atm traffic mode of an ima group. in this mode, the physical link can be used to transfer data only when the link?s ne?s tx and rx and fe?s tx and rx are all in active state.
IDT82V2608 inverse multiplexing for atm glossary 94 december 4, 2006 tap bus ? test access port bus tc ? transmission convergence trl ? timing reference link. tx ? transmit (side) uas ? unavailable seconds uas-ima ? unavailable seconds for ima. interval during which the ima receiver is declared unavailable. the period of unavailability begi ns at the onset of 10 continu ous ses-ima, including the first 10 se conds to enter the uas-ima conditi on. the period of unavailability ends at the onset of 10 continu ous seconds with no ses-ima, excluding the last 10 seconds to exit the uas-ima condition. unusable ? this is a link state indicating the link is not in use due to fault, inhibition, etc. usable ? this is a link state indicating the link is ready to operate in the specified direction, but it is waiting to move to active. uus ? unusable seconds. number of seconds during which the link state is unusable.
index 95 december 4, 2006 a a.c. characteristics ............................................................................ 82 absolute maximum ratings ................................................................. 81 add links to a group ............................................................................ 70 addrxlink command ..................................................... 19 , 23 , 30 , 46 addtxlink command ..................................................... 19 , 23 , 30 , 44 b blocked-fe ......................................................................................... 72 c command addrxlink .............................................................. 19 , 23 , 30 , 46 addtxlink .............................................................. 19 , 23 , 30 , 44 configdev .............................................................................30 , 33 configgroupinterface ..........................................................18 , 39 configgrouppara ....................................................................... 37 configgroupworkmode .............................................................. 40 configgsmtimers ...................................................................... 41 configifsmpara ......................................................................... 43 configloopmode ...........................................................18 , 23 , 36 configslaveframe ...................................................................... 76 configtrllink ......................................................................30 , 42 configunilink ..................................................18 , 19 , 23 , 30 , 47 configutopiaif ..............................................................18 , 35 , 77 deactlink .............................................................................56 , 70 deletegrp .............................................................................53 , 70 deletelink ............................................................................55 , 70 deviceinitial ................................................................................ 74 getconfigpara ............................................................................ 63 getgroupdelayinfo .................................................................... 58 getgroupstate ........................................................................... 57 getgrpperf ................................................................................. 60 getgrpworkingpara ................................................................... 64 getlinkperf ................................................................................ 61 getlinkstate ............................................................................... 59 getlinkworkingpara .................................................................. 65 getloopedtestpattern ............................................................... 67 getversioninfo .....................................................................68 , 78 groupinitial ................................................................................. 79 inhibitgrp ..............................................................................50 , 70 notinhibitgrp ........................................................................51 , 70 recoverlink .........................................................................54 , 70 restartgrp ............................................................................52 , 70 startgroup ............................................................................48 , 70 startlasr ............................................................................49 , 70 starttestpattern ......................................................................... 66 stoptestpattern ..........................................................................68 command description ................................................................... 33 , 73 command set list and their encoding ..................................................32 config-aborted ....................................................................................72 config-aborted-fe ..............................................................................72 configdev command ................................................................... 30 , 33 configgroupinterface command ................................................ 18 , 39 configgrouppara command ...............................................................37 configgroupworkmode command .....................................................40 configgsmtimers command .............................................................41 configifsmpara command ................................................................43 configloopmode command .................................................. 18 , 23 , 36 configslaveframe command .............................................................76 configtrllink command ............................................................ 30 , 42 configunilink command ......................................... 18 , 19 , 23 , 30 , 47 configure a group ................................................................................69 configutopiaif command ..................................................... 18 , 35 , 77 d d.c. characteristics .............................................................................81 deactivate links ...................................................................................70 deactlink command .................................................................... 56 , 70 delete a group .....................................................................................70 delete links ..........................................................................................70 deletegrp command .................................................................... 53 , 70 deletelink command ................................................................... 55 , 70 deviceinitial command ........................................................................74 e errored icp .........................................................................................71 f failure/alarm signal blocked-fe .................................................................................72 config-aborted ............................................................................72 config-aborted-fe ......................................................................72 gr-timing-mismatch ..................................................................72 insufficient-links .........................................................................72 insufficient-links-fe ...................................................................72 lcd .............................................................................................72 lif ...............................................................................................72 lods ..........................................................................................72 rfi-ima .......................................................................................72 rx-unusable-fe .........................................................................72 start-up-fe .................................................................................72 tx-unusable-fe ..........................................................................72 fifo_int_enable_reg register .....................................................26 index
IDT82V2608 inverse multiplexing for atm index 96 december 4, 2006 fifo_int_reset_reg register ....................................................... 26 fifo_state_reg register ............................................................... 26 g g.802 mapping ................................................................................... 20 getconfigpara command ................................................................... 63 getgroupdelayinfo command ............................................................ 58 getgroupstate command .................................................................. 57 getgrpperf command ........................................................................ 60 getgrpworkingpara command .......................................................... 64 getlinkperf command ........................................................................ 61 getlinkstate command ...................................................................... 59 getlinkworkingpara command ......................................................... 65 getloopedtestpattern command ...................................................... 67 getversioninfo command ............................................................ 68 , 78 global signals ...................................................................................... 12 glossary .............................................................................................. 91 group auto detect master side ................................................................................. 73 slave side ................................................................................... 73 groupinitial command ........................................................................ 79 gr-timing-mismatch ......................................................................... 72 gr-uas-ima ...................................................................................... 71 h hcs_err_tc ............................................................................ 61 , 71 i ima frame ........................................................................................... 30 ima initialization ................................................................................. 69 ima mode ........................................................................................... 30 ima operation ..................................................................................... 69 imaos08 ...............................................................................24 , 27 , 73 imaos08_slave ....................................................................24 , 27 , 73 inhibit a group ..................................................................................... 70 inhibitgrp command .................................................................... 50 , 70 input_fifo_data_reg register .................................................... 25 input_fifo_internal_state_reg register .............................. 27 input_fifo_length_reg register ............................................... 25 insufficient-links ................................................................................. 72 insufficient-links-fe ........................................................................... 72 intel microprocessor interface timing .................................................. 87 interface jtag & scan .............................................................................. 80 jtag & scan interface ............................................................... 16 line interface ........................................................................ 13 , 19 microprocessor ........................................................................... 24 microprocessor interface ............................................................ 14 sram interface ................................................................... 15 , 29 utopia interface .......................................................................... 18 invalid icp .......................................................................................... 71 iv-ima ......................................................................................... 61 , 71 j jtag & scan interface ................................................................16 , 80 jtag instructions ............................................................................... 80 l lcd .................................................................................................... 72 lif ...................................................................................................... 72 line interface .................................................................................13 , 19 external loopback ....................................................................... 23 internal loopback ........................................................................ 23 loopback ..................................................................................... 23 external loopback ............................................................... 23 internal loopback ................................................................ 23 timing clock mode ...................................................................... 23 line interface timing ............................................................................ 84 line interface timing clock mode ......................................................... 23 line interface work mode mode0 ........................................................................................ 20 mode1~mode4 ........................................................................... 20 mode11 ...................................................................................... 22 mode12 and mode13 ................................................................. 22 mode14 and mode15 ................................................................. 23 mode5 and mode6 ..................................................................... 22 mode7~mode10 ......................................................................... 22 link backup ......................................................................................... 30 lods ................................................................................................. 72 loopback ............................................................................................. 23 line interface ............................................................................... 23 utopia loopback ......................................................................... 18 m mapping g.802 mapping .......................................................................... 20 spaced mapping ......................................................................... 21 master side ........................................................................................ 73 maximum delay tolerance .................................................................. 29 sram size ................................................................................. 29 microprocessor interface ..............................................................14 , 24 microprocessor interface timing intel ............................................................................................ 87 motorola ..................................................................................... 85 missing icp ........................................................................................ 71 mode ima mode ................................................................................... 30 uni mode ................................................................................... 30 motorola microprocessor interface timing ................................................. 85 multi-rate ............................................................................................ 22 n not inhibit a group .............................................................................. 70 notinhibitgrp command ...............................................................51 , 70
IDT82V2608 inverse multiplexing for atm index 97 december 4, 2006 o ocd_tc ...................................................................................... 61 , 71 oif-ima ....................................................................................... 61 , 71 output_fifo_data_reg register ................................................ 25 output_fifo_interna l_state_reg register .......................... 26 output_fifo_length_reg register ........................................... 25 p performance monitoring ..................................................................... 71 physical and electrical characteristics ................................................ 81 pin description global signals .............................................................................. 12 jtag & scan interface ............................................................... 16 line interface ............................................................................... 13 microprocessor interface ............................................................ 14 others ......................................................................................... 17 power supplies and grounds ....................................................... 16 sram interface .......................................................................... 15 pmon ................................................................................................. 71 pmon parameters gr-uas-ima .............................................................................. 71 hcs_err_tc ..................................................................... 61 , 71 iv-ima ................................................................................. 61 , 71 ocd_tc .............................................................................. 61 , 71 oif-ima ............................................................................... 61 , 71 rx-stuff-ima ........................................................................ 61 , 71 rx-uus-ima ........................................................................ 61 , 71 rx-uus-ima-fe .................................................................. 61 , 71 ses-ima .............................................................................. 61 , 71 ses-ima-fe ........................................................................ 61 , 71 tx-stuff-ima ........................................................................ 61 , 71 tx-uus-ima ........................................................................ 61 , 71 tx-uus-ima-fe .................................................................. 61 , 71 uas-ima .............................................................................. 61 , 71 uas-ima-fe ........................................................................ 61 , 71 power supplies and grounds .............................................................. 16 r recover links ....................................................................................... 70 recoverlink command ................................................................ 54 , 70 register fifo_int_enable_reg .......................................................... 26 fifo_int_reset_reg ............................................................ 26 fifo_state_reg .................................................................... 26 input_fifo_data_reg ......................................................... 25 input_fifo_internal_state_reg ................................... 27 input_fifo_length_reg .................................................... 25 output_fifo_data_reg ..................................................... 25 output_fifo_internal_state_reg ............................... 26 output_fifo_length_reg ................................................ 25 register description ............................................................................. 25 register list and map ........................................................................... 24 restart a group .................................................................................... 70 restartgrp command ...................................................................52 , 70 rfi-ima .............................................................................................. 72 rx-stuff-ima ................................................................................61 , 71 rx-unusable-fe ................................................................................ 72 rx-uus-ima ................................................................................61 , 71 rx-uus-ima-fe ..........................................................................61 , 71 s ses-ima ......................................................................................61 , 71 ses-ima-fe ................................................................................61 , 71 slave side ........................................................................................... 73 spaced mapping ................................................................................. 21 sram interface ............................................................................15 , 29 sram interface timing ....................................................................... 89 sram size maximum delay tolerance .......................................................... 29 start up a group .................................................................................. 70 startgroup command ...................................................................48 , 70 startlasr command ...................................................................49 , 70 starttestpattern command ................................................................ 66 start-up-fe ........................................................................................ 72 stoptestpattern command ................................................................ 68 stuffing mode ..................................................................................... 30 ctc ............................................................................................ 30 itc ............................................................................................. 30 t t1 isdn mode ................................................................................... 22 t1 normal mode ................................................................................. 22 timing line interface timing .................................................................... 84 microprocessor interface timing intel .................................................................................... 87 motorola ............................................................................. 85 sram interface timing ............................................................... 89 utopia interface timing ............................................................... 83 timing clock mode line interface ............................................................................... 23 timing reference link ........................................................................... 30 trl .................................................................................................... 30 tx-stuff-ima .................................................................................61 , 71 tx-unusable-fe ................................................................................. 72 tx-uus-ima .................................................................................61 , 71 tx-uus-ima-fe ...........................................................................61 , 71 u uas-ima ......................................................................................61 , 71 uas-ima-fe ................................................................................61 , 71 uni mode ........................................................................................... 30 utopia interface .................................................................................. 18 utopia interface timing ....................................................................... 83 utopia loopback ................................................................................. 18
IDT82V2608 inverse multiplexing for atm the idt logo is a registered trademark of integrated device technology, inc. 98 corporate headquarters 6024 silver creek valley road san jose, ca 95138 for sales: 1-800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com for tech support: 408-360-1552 email:telecomhelp@idt.com ordering information idt xxxxxxx xx x device type package process/temperature range blank industrial (-40 c to +85 c) bb plastic ball grid array (pbga, bb208) 82v2608 inverse multiplexing for atm data sheet document history 12/04/2006 page 33 04/07/2006 pages 9, 26, 41, 65, 72, 80 12/08/2003 page 1 10/17/2003 pages 1, 9, 10, 22, 25, 28, 36, 38, 65, 74, 75

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